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| author | Jiri Kosina <jkosina@suse.cz> | 2012-04-08 19:48:52 (GMT) |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2012-04-08 19:48:52 (GMT) |
| commit | e75d660672ddd11704b7f0fdb8ff21968587b266 (patch) | |
| tree | ccb9c107744c10b553c0373e450bee3971d16c00 /Documentation/hwmon/zl6100 | |
| parent | 61282f37927143e45b03153f3e7b48d6b702147a (diff) | |
| parent | 0034102808e0dbbf3a2394b82b1bb40b5778de9e (diff) | |
| download | linux-e75d660672ddd11704b7f0fdb8ff21968587b266.tar.xz | |
Merge branch 'master' into for-next
Merge with latest Linus' tree, as I have incoming patches
that fix code that is newer than current HEAD of for-next.
Conflicts:
drivers/net/ethernet/realtek/r8169.c
Diffstat (limited to 'Documentation/hwmon/zl6100')
| -rw-r--r-- | Documentation/hwmon/zl6100 | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/Documentation/hwmon/zl6100 b/Documentation/hwmon/zl6100 index 5865a24..a995b41 100644 --- a/Documentation/hwmon/zl6100 +++ b/Documentation/hwmon/zl6100 @@ -34,6 +34,14 @@ Supported chips: Prefix: 'zl6105' Addresses scanned: - Datasheet: http://www.intersil.com/data/fn/fn6906.pdf + * Intersil / Zilker Labs ZL9101M + Prefix: 'zl9101' + Addresses scanned: - + Datasheet: http://www.intersil.com/data/fn/fn7669.pdf + * Intersil / Zilker Labs ZL9117M + Prefix: 'zl9117' + Addresses scanned: - + Datasheet: http://www.intersil.com/data/fn/fn7914.pdf * Ericsson BMR450, BMR451 Prefix: 'bmr450', 'bmr451' Addresses scanned: - @@ -88,14 +96,12 @@ Module parameters delay ----- -Some Intersil/Zilker Labs DC-DC controllers require a minimum interval between -I2C bus accesses. According to Intersil, the minimum interval is 2 ms, though -1 ms appears to be sufficient and has not caused any problems in testing. -The problem is known to affect ZL6100, ZL2105, and ZL2008. It is known not to -affect ZL2004 and ZL6105. The driver automatically sets the interval to 1 ms -except for ZL2004 and ZL6105. To enable manual override, the driver provides a -writeable module parameter, 'delay', which can be used to set the interval to -a value between 0 and 65,535 microseconds. +Intersil/Zilker Labs DC-DC controllers require a minimum interval between I2C +bus accesses. According to Intersil, the minimum interval is 2 ms, though 1 ms +appears to be sufficient and has not caused any problems in testing. The problem +is known to affect all currently supported chips. For manual override, the +driver provides a writeable module parameter, 'delay', which can be used to set +the interval to a value between 0 and 65,535 microseconds. Sysfs entries |