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authorAlexey Dobriyan <adobriyan@gmail.com>2014-06-06 21:36:41 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2014-06-06 23:08:11 (GMT)
commit615cc2c9cf9529846fbc342560d6787c2ccaaeea (patch)
tree06c165479bc9ef613c0b74fd50ac88346dd91c60 /Documentation/memory-barriers.txt
parent0b07cb8271507ca99cca79222a1dc92ba415f06b (diff)
downloadlinux-615cc2c9cf9529846fbc342560d6787c2ccaaeea.tar.xz
Documentation/memory-barriers.txt: fix important typo re memory barriers
Examples introducing neccesity of RMB+WMP pair reads as A=3 READ B www rrrrrr B=4 READ A Note the opposite order of reads vs writes. But the first example without barriers reads as A=3 READ A B=4 READ B There are 4 outcomes in the first example. But if someone new to the concept tries to insert barriers like this: A=3 READ A www rrrrrr B=4 READ B he will still get all 4 possible outcomes, because "READ A" is first. All this can be utterly confusing because barrier pair seems to be superfluous. In short, fixup first example to match latter examples with barriers. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Cc: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'Documentation/memory-barriers.txt')
-rw-r--r--Documentation/memory-barriers.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index 46412bd..f1dc4a2 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -115,8 +115,8 @@ For example, consider the following sequence of events:
CPU 1 CPU 2
=============== ===============
{ A == 1; B == 2 }
- A = 3; x = A;
- B = 4; y = B;
+ A = 3; x = B;
+ B = 4; y = A;
The set of accesses as seen by the memory system in the middle can be arranged
in 24 different combinations: