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author | Anders Berg <anders.berg@lsi.com> | 2014-05-23 09:08:35 (GMT) |
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committer | Arnd Bergmann <arnd@arndb.de> | 2014-05-23 16:18:39 (GMT) |
commit | 1d22924e1c4e299337e86e290c02c3e3eb43b608 (patch) | |
tree | 53ebde5a7a8bef8e3ac50be57733505110b287ba /Documentation/sparse.txt | |
parent | a798c10faf62a505d24e5f6213fbaf904a39623f (diff) | |
download | linux-1d22924e1c4e299337e86e290c02c3e3eb43b608.tar.xz |
ARM: Add platform support for LSI AXM55xx SoC
The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15
cores (in a 4x4 cluster configuration). The cores within each cluster share an
L2 cache, and the clusters are connected to each other via a CCN-504 cache
coherent interconnect.
This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located
above 4GB in the memory map.
Signed-off-by: Anders Berg <anders.berg@lsi.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/sparse.txt')
0 files changed, 0 insertions, 0 deletions