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| author | Pang Raymond <Raymond_rule@hotmail.com> | 2016-07-20 12:13:46 (GMT) |
|---|---|---|
| committer | Tejun Heo <tj@kernel.org> | 2016-07-20 15:10:10 (GMT) |
| commit | 0516900adfa1955f91f1c310f9a2fa857949de1c (patch) | |
| tree | ef78ae7de1456cd75e89be78a0b0d678d4697632 /Documentation | |
| parent | 01c292068e43e72091c22542df5f01b3c09714b2 (diff) | |
| download | linux-0516900adfa1955f91f1c310f9a2fa857949de1c.tar.xz | |
AHCI: Clear GHC.IS to prevent unexpectly asserting INTx
Due to PCI subsystem behaviour, unloading AHCI driver will disable
MSI and enable INTx. When HBA supports MSIx or Multiple MSI, Driver's
irq handler doesn't clear GHC.IS register. It works well when reading or
writing data and GHC.IS is always non-zero. But when unloading driver
(or any other operation which causes disable MSIx and enable INTx), PCI
subsystem uses config write(Rx04.bit10) to enable INTx. Because
GHC.IS is non-zero, HBA will falsely assume some port needs interrupt
service. Then it asserts INTx. To make things worse, when AHCI controller
shares the same interrupt pin with other PCI device, that PCI device's ISR
will be called and nobody de-asserts previous INTx.
This patch clears GHC.IS in ahci_port_stop() even when using MSIx or
MMSI to prevent this case. It ensures GHC.IS is zero before PCI subsystem
enables INTx.
tj: Minor updates to the comment.
Signed-off-by: Raymond Pang <raymond_rule@hotmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions