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| author | Josh Wu <josh.wu@atmel.com> | 2015-07-20 09:32:05 (GMT) |
|---|---|---|
| committer | Sebastian Reichel <sre@kernel.org> | 2015-07-20 16:12:09 (GMT) |
| commit | 1ae25d626cfe7e11adc2c3e71d0de1f882954ef3 (patch) | |
| tree | 175a6947732fc24b64cbf9d1c1919adfadb36ede /Documentation | |
| parent | b1a55af2773d5e4d30b748517fedfac26fc5fd81 (diff) | |
| download | linux-1ae25d626cfe7e11adc2c3e71d0de1f882954ef3.tar.xz | |
power: reset: at91: add sama5d3 reset function
This patch introduces a new compatible string: "atmel,sama5d3-rstc" and
new reset function for sama5d3 and later chips.
As in sama5d3 or later chips, we don't have to shutdown the DDR
controller before reset. Shutdown the DDR controller before reset is a
workaround to avoid DDR signal driving the bus, but since sama5d3 and
later chips there is no such a conflict.
So in this patch:
1. the sama5d3 reset function only need to write the rstc register
and return.
2. we can remove the code related with sama5d3 DDR controller as
we don't use it at all.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/atmel-at91.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt index 424ac8c..dd998b9 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.txt +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt @@ -87,7 +87,7 @@ One interrupt per TC channel in a TC block: RSTC Reset Controller required properties: - compatible: Should be "atmel,<chip>-rstc". - <chip> can be "at91sam9260" or "at91sam9g45" + <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3" - reg: Should contain registers location and length Example: |