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author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-10-18 23:02:29 (GMT) |
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committer | Jason Cooper <jason@lakedaemon.net> | 2013-10-23 11:04:29 (GMT) |
commit | f63834e6c6145fb7667ef0c645cbc52313e71c69 (patch) | |
tree | c7e075fca38361afbc188f8b031210dd2c7829ed /Documentation | |
parent | 1deb122c724edfd799a4d7d0b88ff14c365c9e69 (diff) | |
download | linux-f63834e6c6145fb7667ef0c645cbc52313e71c69.tar.xz |
ARM: mvebu: Add Core Divider clock device-tree binding
The Armada 370/XP SoCs have a Core Divider clock providing
several clocks. For now, only the NAND clock is supported.
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt new file mode 100644 index 0000000..c62391f --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mvebu-corediv-clock.txt @@ -0,0 +1,19 @@ +* Core Divider Clock bindings for Marvell MVEBU SoCs + +The following is a list of provided IDs and clock names on Armada 370/XP: + 0 = nand (NAND clock) + +Required properties: +- compatible : must be "marvell,armada-370-corediv-clock" +- reg : must be the register address of Core Divider control register +- #clock-cells : from common clock binding; shall be set to 1 +- clocks : must be set to the parent's phandle + +Example: + +corediv_clk: corediv-clocks@18740 { + compatible = "marvell,armada-370-corediv-clock"; + reg = <0x18740 0xc>; + #clock-cells = <1>; + clocks = <&pll>; +}; |