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author | Arnd Bergmann <arnd@arndb.de> | 2015-05-13 15:56:47 (GMT) |
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committer | Arnd Bergmann <arnd@arndb.de> | 2015-05-13 15:56:47 (GMT) |
commit | 92d19e26d67704397b70cf5728fd77bd13b74c43 (patch) | |
tree | ad1dc28de359a2004275e067158a806d4fe2b11d /Documentation | |
parent | fe7a5bfe18f06a418705098f6212bda2cbdcadb5 (diff) | |
parent | 6ea2609ab386f6bfeebc39e1418b7497a9deb55c (diff) | |
download | linux-92d19e26d67704397b70cf5728fd77bd13b74c43.tar.xz |
Merge tag 'tegra-for-4.2-ramcode' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "ARM: tegra: RAM code access for v4.2-rc1" from Thierry Reding:
The RAM code is used by the memory and external memory controllers to
determine which set of timings to use for memory frequency scaling.
* tag 'tegra-for-4.2-ramcode' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: fuse: Add RAM code reader helper
of: Document long-ram-code property in nvidia,tegra20-apbmisc
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt index 47b205c..4556359 100644 --- a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt @@ -10,3 +10,5 @@ Required properties: The second entry gives the physical address and length of the registers indicating the strapping options. +Optional properties: +- nvidia,long-ram-code: If present, the RAM code is long (4 bit). If not, short (2 bit). |