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author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2013-05-31 13:38:23 (GMT) |
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committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-06-28 18:25:43 (GMT) |
commit | f7354e6c230ec62d221e51aa3f970fd3d5eb2067 (patch) | |
tree | f71cb2eefb2f3df346df91f0bcb5eb8e1f8342d0 /Documentation | |
parent | 086eca2905d0d1ea6b5e22d62648c6b818c51846 (diff) | |
download | linux-f7354e6c230ec62d221e51aa3f970fd3d5eb2067.tar.xz |
[media] exynos4-is: Add support for Exynos5250 MIPI-CSIS
Add compatible property for the Exynos5250 and enable the frame start
and frame end interrupts. These interrupts are needed for the Exynos5
FIMC-IS firmware. The driver enables those interrupt only where available,
depending on the 'compatible' property. This can be optimized further,
by exposing some API at the subdev driver, so the host driver can enable
extra interrupts only for the image processing chains involving FIMC-IS.
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/media/samsung-mipi-csis.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/media/samsung-mipi-csis.txt b/Documentation/devicetree/bindings/media/samsung-mipi-csis.txt index 5f8e28e..be45f0b 100644 --- a/Documentation/devicetree/bindings/media/samsung-mipi-csis.txt +++ b/Documentation/devicetree/bindings/media/samsung-mipi-csis.txt @@ -5,8 +5,8 @@ Required properties: - compatible : "samsung,s5pv210-csis" for S5PV210 (S5PC110), "samsung,exynos4210-csis" for Exynos4210 (S5PC210), - "samsung,exynos4212-csis" for Exynos4212/Exynos4412 - SoC series; + "samsung,exynos4212-csis" for Exynos4212/Exynos4412, + "samsung,exynos5250-csis" for Exynos5250; - reg : offset and length of the register set for the device; - interrupts : should contain MIPI CSIS interrupt; the format of the interrupt specifier depends on the interrupt controller; |