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| author | Jesse Brandeburg <jesse.brandeburg@intel.com> | 2006-11-01 16:47:42 (GMT) |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2006-12-02 05:11:59 (GMT) |
| commit | 2ce9047f5d8464039da8ff986e71be5546e229c0 (patch) | |
| tree | 4e888a376bb97c9688d8ebb70d1ffef144b5529f /MAINTAINERS | |
| parent | 21c4d5e07859a6fc0f62be37da15b161e142c8d1 (diff) | |
| download | linux-2ce9047f5d8464039da8ff986e71be5546e229c0.tar.xz | |
e1000: add mmiowb() for IA64 to sync tail writes
IA64 SMP systems were seeing TX issues with multiple cpu's attempting
to write tail registers unordered. This mmiowb() fixes the issue.
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions