diff options
| author | Ivan Kokshaysky <ink@jurassic.park.msu.ru> | 2010-10-26 21:22:17 (GMT) |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-26 23:52:12 (GMT) |
| commit | 98c532ecbe582586e204688c6cde7e27580cc43f (patch) | |
| tree | 6659f979076730695af09d9e3653074a6d9643c3 /arch/alpha/kernel/core_t2.c | |
| parent | 947272dd3e959c69ff0fc54e62e44163b729b796 (diff) | |
| download | linux-98c532ecbe582586e204688c6cde7e27580cc43f.tar.xz | |
alpha: use single HAE window on T2 core logic (gamma, sable)
T2 are the only alpha SMP systems that do HAE switching at runtime, which
is fundamentally racy on SMP. This patch limits MMIO space on T2 to HAE0
only, like we did on MCPCIA (rawhide) long ago. This leaves us with only
112 Mb of PCI MMIO (128 Mb HAE aperture minus 16 Mb reserved for EISA),
but since linux PCI allocations are reasonably tight, it should be enough
for sane hardware configurations.
Also, fix a typo in MCPCIA_FROB_MMIO macro which shouldn't call set_hae()
if MCPCIA_ONE_HAE_WINDOW is defined. It's more for correctness, as
set_hae() is a no-op anyway in that case.
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/alpha/kernel/core_t2.c')
| -rw-r--r-- | arch/alpha/kernel/core_t2.c | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/alpha/kernel/core_t2.c b/arch/alpha/kernel/core_t2.c index e6d9056..2f770e9 100644 --- a/arch/alpha/kernel/core_t2.c +++ b/arch/alpha/kernel/core_t2.c @@ -74,8 +74,6 @@ # define DBG(args) #endif -DEFINE_RAW_SPINLOCK(t2_hae_lock); - static volatile unsigned int t2_mcheck_any_expected; static volatile unsigned int t2_mcheck_last_taken; @@ -406,6 +404,7 @@ void __init t2_init_arch(void) { struct pci_controller *hose; + struct resource *hae_mem; unsigned long temp; unsigned int i; @@ -433,7 +432,13 @@ t2_init_arch(void) */ pci_isa_hose = hose = alloc_pci_controller(); hose->io_space = &ioport_resource; - hose->mem_space = &iomem_resource; + hae_mem = alloc_resource(); + hae_mem->start = 0; + hae_mem->end = T2_MEM_R1_MASK; + hae_mem->name = pci_hae0_name; + if (request_resource(&iomem_resource, hae_mem) < 0) + printk(KERN_ERR "Failed to request HAE_MEM\n"); + hose->mem_space = hae_mem; hose->index = 0; hose->sparse_mem_base = T2_SPARSE_MEM - IDENT_ADDR; |