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| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-06-20 15:25:44 (GMT) |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-06-20 15:25:44 (GMT) |
| commit | af52739b922f656eb1f39016fabaabe4baeda2e2 (patch) | |
| tree | 79a7aa810d0493cd0cf4adebac26d37f12e8b545 /arch/arc/include/asm/pgtable.h | |
| parent | 25ed6a5e97809129a1bc852b6b5c7d03baa112c4 (diff) | |
| parent | 33688abb2802ff3a230bd2441f765477b94cc89e (diff) | |
| download | linux-af52739b922f656eb1f39016fabaabe4baeda2e2.tar.xz | |
Merge 4.7-rc4 into staging-next
We want the fixes in here, and we can resolve a merge issue in
drivers/iio/industrialio-trigger.c
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arc/include/asm/pgtable.h')
| -rw-r--r-- | arch/arc/include/asm/pgtable.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h index 034bbdc..858f98e 100644 --- a/arch/arc/include/asm/pgtable.h +++ b/arch/arc/include/asm/pgtable.h @@ -47,7 +47,7 @@ * Page Tables are purely for Linux VM's consumption and the bits below are * suited to that (uniqueness). Hence some are not implemented in the TLB and * some have different value in TLB. - * e.g. MMU v2: K_READ bit is 8 and so is GLOBAL (possible becoz they live in + * e.g. MMU v2: K_READ bit is 8 and so is GLOBAL (possible because they live in * seperate PD0 and PD1, which combined forms a translation entry) * while for PTE perspective, they are 8 and 9 respectively * with MMU v3: Most bits (except SHARED) represent the exact hardware pos |