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| author | Jonathan Austin <jonathan.austin@arm.com> | 2012-08-30 12:46:44 (GMT) |
|---|---|---|
| committer | Jonathan Austin <jonathan.austin@arm.com> | 2013-06-07 16:02:48 (GMT) |
| commit | ed18bdc875328921114139e17ade1d2569e82c85 (patch) | |
| tree | 33a38fb5f3e0e5077af20b3faf19f795deaa1b15 /arch/arm/Kconfig.debug | |
| parent | c90ad5c940583525f46938149b91187e75acc546 (diff) | |
| download | linux-ed18bdc875328921114139e17ade1d2569e82c85.tar.xz | |
ARM: vexpress: Add Cortex-R Series UART, selectable via DEBUG_LL
The Cortex-R series processors on Versatile Express have a different memory
map to the RS1 and CA9X4 tiles. Most of the platform difference can be
expressed in device-trees, but the UART definitions for LL_DEBUG cannot.
This patch defines the UART location for R-Series processors on
versatile-express, allowing low-level debug and output from the decompressor.
These definitions are selectable via Kconfig
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
CC: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch/arm/Kconfig.debug')
| -rw-r--r-- | arch/arm/Kconfig.debug | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 1d41908..f2623b2 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -476,6 +476,13 @@ choice of the tiles using the RS1 memory map, including all new A-class core tiles, FPGA-based SMMs and software models. + config DEBUG_VEXPRESS_UART0_CRX + bool "Use PL011 UART0 at 0xb0090000 (Cortex-R compliant tiles)" + depends on ARCH_VEXPRESS && !MMU + help + This option selects UART0 at 0xb0090000. This is appropriate for + Cortex-R series tiles and SMMs, such as Cortex-R5 and Cortex-R7 + config DEBUG_VT8500_UART0 bool "Use UART0 on VIA/Wondermedia SoCs" depends on ARCH_VT8500 @@ -645,7 +652,8 @@ config DEBUG_LL_INCLUDE default "debug/tegra.S" if DEBUG_TEGRA_UART default "debug/ux500.S" if DEBUG_UX500_UART default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \ - DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1 + DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1 || \ + DEBUG_VEXPRESS_UART0_CRX default "debug/vt8500.S" if DEBUG_VT8500_UART0 default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1 default "mach/debug-macro.S" |