diff options
| author | Tomasz Figa <t.figa@samsung.com> | 2013-12-18 18:17:43 (GMT) |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2013-12-20 23:24:38 (GMT) |
| commit | 39e596f095a103176cfd7a54fd53c0fb9d6b8952 (patch) | |
| tree | 2e7f59cb797b0849b25a0e1f47e63a4699750484 /arch/arm/boot/dts/exynos4x12.dtsi | |
| parent | 1b35bb80d830afc05cc36a5dfc2ecc5ad281168e (diff) | |
| download | linux-39e596f095a103176cfd7a54fd53c0fb9d6b8952.tar.xz | |
ARM: dts: Move MCT node to exynos4x12.dtsi
For MCT block compatible with "samsung,exynos4412-mct", that uses PPI
interrupts for local timers, only one local interrupt needs to be
specified, since it is a per-processor interrupt.
This allows moving MCT node of Exynos4x12 SoCs back to common
exynos4x12.dtsi, since they have the same set of interrupts to be
specified, which was the only difference.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos4x12.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos4x12.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 1917c82..59127a9 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -42,6 +42,26 @@ #clock-cells = <1>; }; + mct@10050000 { + compatible = "samsung,exynos4412-mct"; + reg = <0x10050000 0x800>; + interrupt-parent = <&mct_map>; + interrupts = <0 0>, <1 0>, <2 0>, <3 0>, <4 0>; + clocks = <&clock 3>, <&clock 344>; + clock-names = "fin_pll", "mct"; + + mct_map: mct-map { + #interrupt-cells = <2>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = <0x0 0 &gic 0 57 0>, + <0x1 0 &combiner 12 5>, + <0x2 0 &combiner 12 6>, + <0x3 0 &combiner 12 7>, + <0x4 0 &gic 1 12 0>; + }; + }; + pinctrl_0: pinctrl@11400000 { compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11400000 0x1000>; |