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authorShawn Guo <shawn.guo@linaro.org>2013-01-08 06:25:14 (GMT)
committerShawn Guo <shawn.guo@linaro.org>2013-02-10 15:25:46 (GMT)
commit96574a6dc6bee2320276d7468162a72a0e5c3a34 (patch)
treefb6bb48900eb65d4c854c9f95cbef50c1b360e24 /arch/arm/boot/dts/imx6q.dtsi
parent1982d5b6c1b78363b5142eb0cb81c38d7604fc61 (diff)
downloadlinux-96574a6dc6bee2320276d7468162a72a0e5c3a34.tar.xz
ARM: imx: enable imx6q-cpufreq support
Update operating-points per hardware document and add support for 1 GHz and 1.2 GHz frequencies. 400 MHz, 800 MHz and 1 GHz should be supported by all i.MX6Q chips, while 1.2 GHz support needs to know from OTP fuse bit. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi20
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index ddc78de..ec092d29 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -38,12 +38,19 @@
next-level-cache = <&L2>;
operating-points = <
/* kHz uV */
- 792000 1100000
+ 1200000 1275000
+ 996000 1250000
+ 792000 1150000
396000 950000
- 198000 850000
>;
clock-latency = <61036>; /* two CLK32 periods */
- cpu0-supply = <&reg_cpu>;
+ clocks = <&clks 104>, <&clks 6>, <&clks 16>,
+ <&clks 17>, <&clks 170>;
+ clock-names = "arm", "pll2_pfd2_396m", "step",
+ "pll1_sw", "pll1_sys";
+ arm-supply = <&reg_arm>;
+ pu-supply = <&reg_pu>;
+ soc-supply = <&reg_soc>;
};
cpu@1 {
@@ -471,7 +478,7 @@
anatop-max-voltage = <2750000>;
};
- reg_cpu: regulator-vddcore@140 {
+ reg_arm: regulator-vddcore@140 {
compatible = "fsl,anatop-regulator";
regulator-name = "cpu";
regulator-min-microvolt = <725000>;
@@ -485,7 +492,7 @@
anatop-max-voltage = <1450000>;
};
- regulator-vddpu@140 {
+ reg_pu: regulator-vddpu@140 {
compatible = "fsl,anatop-regulator";
regulator-name = "vddpu";
regulator-min-microvolt = <725000>;
@@ -499,7 +506,7 @@
anatop-max-voltage = <1450000>;
};
- regulator-vddsoc@140 {
+ reg_soc: regulator-vddsoc@140 {
compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc";
regulator-min-microvolt = <725000>;
@@ -965,6 +972,7 @@
};
ocotp@021bc000 {
+ compatible = "fsl,imx6q-ocotp";
reg = <0x021bc000 0x4000>;
};