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| author | Marc Zyngier <marc.zyngier@arm.com> | 2017-04-26 06:15:29 (GMT) |
|---|---|---|
| committer | Xie Xiaobo <xiaobo.xie@nxp.com> | 2017-09-25 07:25:48 (GMT) |
| commit | 5b4775e69b71d263360000ba13cc8708678d2135 (patch) | |
| tree | df71fa2b5f15a2e9d7d6927fd74d9e7f17877a35 /arch/arm/boot/dts/ls1021a.dtsi | |
| parent | f939cc2735ec98e7be9407a75509ff5d078014d8 (diff) | |
| download | linux-5b4775e69b71d263360000ba13cc8708678d2135.tar.xz | |
ARM: DTS: Fix register map for virt-capable GIC
Since everybody copied my own mistake from the DT binding example,
let's address all the offenders in one swift go.
Most of them got the CPU interface size wrong (4kB, while it should
be 8kB), except for both keystone platforms which got the control
interface wrong (4kB instead of 8kB).
In a few cases where I knew for sure what implementation was used,
I've added the "arm,gic-400" compatible string. I'm 99% sure that
this is what everyone is using, but short of having the TRM for
all the other SoCs, I've left them alone.
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/ls1021a.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/ls1021a.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index d944b726..3450b56 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -115,11 +115,11 @@ ranges; gic: interrupt-controller@1400000 { - compatible = "arm,cortex-a7-gic"; + compatible = "arm,gic-400", "arm,cortex-a7-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0x0 0x1401000 0x0 0x1000>, - <0x0 0x1402000 0x0 0x1000>, + <0x0 0x1402000 0x0 0x2000>, <0x0 0x1404000 0x0 0x2000>, <0x0 0x1406000 0x0 0x2000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; |