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authorStephen Boyd <sboyd@codeaurora.org>2012-09-05 19:28:58 (GMT)
committerDavid Brown <davidb@codeaurora.org>2012-09-13 18:16:47 (GMT)
commitc446407c09ce0b339a84931f3d45f3dabb9f0b17 (patch)
treed3280103fb3e54d07753927e3363db34e9416dfc /arch/arm/boot/dts/msm8960-cdp.dts
parent85a9f0f576372e033f0aa15485109aa0ee05fef3 (diff)
downloadlinux-c446407c09ce0b339a84931f3d45f3dabb9f0b17.tar.xz
ARM: msm: Add DT support for 8960
Add basic support to boot 8960 with device tree. For now just support a basic machine with a uart device. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [davidb@codeaurora.org: Remove leading zeros] Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/boot/dts/msm8960-cdp.dts')
-rw-r--r--arch/arm/boot/dts/msm8960-cdp.dts41
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/msm8960-cdp.dts b/arch/arm/boot/dts/msm8960-cdp.dts
new file mode 100644
index 0000000..9e621b5
--- /dev/null
+++ b/arch/arm/boot/dts/msm8960-cdp.dts
@@ -0,0 +1,41 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+ model = "Qualcomm MSM8960 CDP";
+ compatible = "qcom,msm8960-cdp", "qcom,msm8960";
+ interrupt-parent = <&intc>;
+
+ intc: interrupt-controller@2000000 {
+ compatible = "qcom,msm-qgic2";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = < 0x02000000 0x1000 >,
+ < 0x02002000 0x1000 >;
+ };
+
+ timer@200a004 {
+ compatible = "qcom,msm-gpt", "qcom,msm-timer";
+ interrupts = <1 2 0x301>;
+ reg = <0x0200a004 0x10>;
+ clock-frequency = <32768>;
+ cpu-offset = <0x80000>;
+ };
+
+ timer@200a024 {
+ compatible = "qcom,msm-dgt", "qcom,msm-timer";
+ interrupts = <1 1 0x301>;
+ reg = <0x0200a024 0x10>,
+ <0x0200a034 0x4>;
+ clock-frequency = <6750000>;
+ cpu-offset = <0x80000>;
+ };
+
+ serial@19c400000 {
+ compatible = "qcom,msm-hsuart", "qcom,msm-uart";
+ reg = <0x16440000 0x1000>,
+ <0x16400000 0x1000>;
+ interrupts = <0 154 0x0>;
+ };
+};