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authorTomi Valkeinen <tomi.valkeinen@ti.com>2014-02-12 13:45:57 (GMT)
committerTomi Valkeinen <tomi.valkeinen@ti.com>2014-03-19 07:31:47 (GMT)
commit9512c6fec829b97ea50c802bee0116a3f9d44225 (patch)
tree2061db788763a79cb3fab79ab5e4fab0d5c10144 /arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
parente1902bbe44844597a38c8cbae30ca895f6e126ee (diff)
downloadlinux-9512c6fec829b97ea50c802bee0116a3f9d44225.tar.xz
ARM: dts: fix omap3 dss clock handle names
The DSS fclk and iclk handles are named differently on OMAP3430 ES1 than on later OMAP revisions. The ES1 has handles 'dss1_alwon_fck_3430es1' and 'dss_ick_3430es1', whereas later revisions have similar names but ending with 'es2'. This means we don't have one clock handle to which we could refer to when defining the DSS clocks. However, as the namespaces are separate for ES1 and ES2+ OMAPs, we can just rename the handles to 'dss1_alwon_fck' and 'dss_ick' for both ES1 and ES2+, removing the issue. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Tested-by: Christoph Fritz <chf.fritz@googlemail.com> Tested-by: Marek Belisko <marek@goldelico.com> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi')
-rw-r--r--arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
index af9ae534..080fb3f 100644
--- a/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-am35xx-omap3430es2plus-clocks.dtsi
@@ -160,7 +160,7 @@
ti,bit-shift = <30>;
};
- dss1_alwon_fck_3430es2: dss1_alwon_fck_3430es2 {
+ dss1_alwon_fck: dss1_alwon_fck_3430es2 {
#clock-cells = <0>;
compatible = "ti,dss-gate-clock";
clocks = <&dpll4_m4x2_ck>;
@@ -169,7 +169,7 @@
ti,set-rate-parent;
};
- dss_ick_3430es2: dss_ick_3430es2 {
+ dss_ick: dss_ick_3430es2 {
#clock-cells = <0>;
compatible = "ti,omap3-dss-interface-clock";
clocks = <&l4_ick>;
@@ -216,7 +216,7 @@
dss_clkdm: dss_clkdm {
compatible = "ti,clockdomain";
clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>,
- <&dss1_alwon_fck_3430es2>, <&dss_ick_3430es2>;
+ <&dss1_alwon_fck>, <&dss_ick>;
};
core_l4_clkdm: core_l4_clkdm {