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author | Zhangfei Gao <zhangfei.gao@linaro.org> | 2014-08-19 03:00:33 (GMT) |
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committer | Wei Xu <xuwei5@hisilicon.com> | 2014-11-07 11:29:16 (GMT) |
commit | 9fb0e6e7e05371c33ee2f8c838117e58e129d72d (patch) | |
tree | 458f3c8e9368c77151a2f35c0cec97f17bd47a54 /arch/arm/boot/dts | |
parent | f114040e3ea6e07372334ade75d1ee0775c355e1 (diff) | |
download | linux-9fb0e6e7e05371c33ee2f8c838117e58e129d72d.tar.xz |
ARM: dts: hix5hd2: add gmac node
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r-- | arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 28 | ||||
-rw-r--r-- | arch/arm/boot/dts/hisi-x5hd2.dtsi | 16 |
2 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts index 05b44c2..0da3f3b 100644 --- a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts +++ b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts @@ -51,3 +51,31 @@ &uart0 { status = "okay"; }; + +&gmac0 { + #address-cells = <1>; + #size-cells = <0>; + phy-handle = <&phy2>; + phy-mode = "mii"; + /* Placeholder, overwritten by bootloader */ + mac-address = [00 00 00 00 00 00]; + status = "okay"; + + phy2: ethernet-phy@2 { + reg = <2>; + }; +}; + +&gmac1 { + #address-cells = <1>; + #size-cells = <0>; + phy-handle = <&phy1>; + phy-mode = "rgmii"; + /* Placeholder, overwritten by bootloader */ + mac-address = [00 00 00 00 00 00]; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi index f85ba29..012525c 100644 --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi @@ -166,5 +166,21 @@ #clock-cells = <1>; }; }; + + gmac0: ethernet@1840000 { + compatible = "hisilicon,hix5hd2-gmac"; + reg = <0x1840000 0x1000>,<0x184300c 0x4>; + interrupts = <0 71 4>; + clocks = <&clock HIX5HD2_MAC0_CLK>; + status = "disabled"; + }; + + gmac1: ethernet@1841000 { + compatible = "hisilicon,hix5hd2-gmac"; + reg = <0x1841000 0x1000>,<0x1843010 0x4>; + interrupts = <0 72 4>; + clocks = <&clock HIX5HD2_MAC1_CLK>; + status = "disabled"; + }; }; }; |