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author | Jisheng Zhang <jszhang@marvell.com> | 2014-12-26 08:57:59 (GMT) |
---|---|---|
committer | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2015-01-07 14:25:13 (GMT) |
commit | d4ce8042bf736aee0f60e5165adacd0f6bfafbb4 (patch) | |
tree | 0321aa38e72046937dabc06867f92a3b8a657b6f /arch/arm/boot | |
parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) | |
download | linux-d4ce8042bf736aee0f60e5165adacd0f6bfafbb4.tar.xz |
ARM: dts: berlin: add pmu node for BG2Q and BG2CD
This patch adds the pmu node, enabling the PMU unit on Marvell BG2Q and
BG2CD SoCs.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/berlin2cd.dtsi | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/berlin2q.dtsi | 8 |
2 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi index 230df3b..a318bc3 100644 --- a/arch/arm/boot/dts/berlin2cd.dtsi +++ b/arch/arm/boot/dts/berlin2cd.dtsi @@ -45,6 +45,11 @@ ranges = <0 0xf7000000 0x1000000>; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + }; + sdhci0: sdhci@ab0000 { compatible = "mrvl,pxav3-mmc"; reg = <0xab0000 0x200>; diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 35253c9..933dcbb 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -63,6 +63,14 @@ ranges = <0 0xf7000000 0x1000000>; interrupt-parent = <&gic>; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + }; + sdhci0: sdhci@ab0000 { compatible = "mrvl,pxav3-mmc"; reg = <0xab0000 0x200>; |