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authorArnd Bergmann <arnd@arndb.de>2014-03-27 00:26:00 (GMT)
committerArnd Bergmann <arnd@arndb.de>2014-03-27 00:26:00 (GMT)
commitb80a6373d6cf7cbd22498409cef7883d7f8209c4 (patch)
treea5b1ac0d2708272f1c2cb435c5226a367b752fda /arch/arm/boot
parent57a0ec38405a27720be1f168807ced0dd615365e (diff)
downloadlinux-b80a6373d6cf7cbd22498409cef7883d7f8209c4.tar.xz
Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac."
This reverts commit 7e0b4cd06201ee9dbdf2d13bfd7b8a021b414e42. The binding changes need to be done differently as well, let's take them through netdev, and merge the dts changes in a new patch here. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi49
-rw-r--r--arch/arm/boot/dts/socfpga_arria5_socdk.dts24
-rw-r--r--arch/arm/boot/dts/socfpga_cyclone5_socdk.dts17
-rw-r--r--arch/arm/boot/dts/socfpga_cyclone5_sockit.dts22
-rw-r--r--arch/arm/boot/dts/socfpga_vt.dts8
5 files changed, 17 insertions, 103 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 404553c..74cceae 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -450,43 +450,26 @@
};
};
- ethernet0: ethernet0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "altr,socfpga-stmmac";
- altr,sysmgr-syscon = <&sysmgr 0x60>;
+ gmac0: ethernet@ff700000 {
+ compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
+ reg = <0xff700000 0x2000>;
+ interrupts = <0 115 4>;
+ interrupt-names = "macirq";
+ mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+ clocks = <&emac0_clk>;
+ clock-names = "stmmaceth";
status = "disabled";
- ranges;
-
- gmac0: gmac0@ff700000 {
- compatible = "snps,dwmac-3.70a", "snps,dwmac";
- reg = <0xff700000 0x2000>;
- interrupts = <0 115 4>;
- interrupt-names = "macirq";
- mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
- clocks = <&emac0_clk>;
- clock-names = "stmmaceth";
- };
};
- ethernet1: ethernet1 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "altr,socfpga-stmmac";
- altr,sysmgr-syscon = <&sysmgr 0x60>;
+ gmac1: ethernet@ff702000 {
+ compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
+ reg = <0xff702000 0x2000>;
+ interrupts = <0 120 4>;
+ interrupt-names = "macirq";
+ mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+ clocks = <&emac1_clk>;
+ clock-names = "stmmaceth";
status = "disabled";
- ranges;
-
- gmac1: gmac1@ff702000 {
- device_type = "network";
- compatible = "snps,dwmac-3.70a", "snps,dwmac";
- reg = <0xff702000 0x2000>;
- interrupts = <0 120 4>;
- interrupt-names = "macirq";
- mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
- clocks = <&emac1_clk>;
- clock-names = "stmmaceth";
- };
};
L2: l2-cache@fffef000 {
diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
index 2d6b38b..5beffb2 100644
--- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts
@@ -37,28 +37,4 @@
*/
ethernet0 = &gmac1;
};
-
- aliases {
- /* this allow the ethaddr uboot environmnet variable contents
- * to be added to the gmac1 device tree blob.
- */
- ethernet0 = &gmac1;
- };
-};
-
-&ethernet1 {
- status = "okay";
-};
-
-&gmac1 {
- phy-mode = "rgmii";
-
- rxd0-skew-ps = <0>;
- rxd1-skew-ps = <0>;
- rxd2-skew-ps = <0>;
- rxd3-skew-ps = <0>;
- txen-skew-ps = <0>;
- txc-skew-ps = <2600>;
- rxdv-skew-ps = <0>;
- rxc-skew-ps = <2000>;
};
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
index 26c63a0..2ee52ab 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -38,20 +38,3 @@
ethernet0 = &gmac1;
};
};
-
-&ethernet1 {
- status = "okay";
-};
-
-&gmac1 {
- phy-mode = "rgmii";
-
- rxd0-skew-ps = <0>;
- rxd1-skew-ps = <0>;
- rxd2-skew-ps = <0>;
- rxd3-skew-ps = <0>;
- txen-skew-ps = <0>;
- txc-skew-ps = <2600>;
- rxdv-skew-ps = <0>;
- rxc-skew-ps = <2000>;
-};
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
index 469bb5c..50b99a2 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
@@ -30,28 +30,8 @@
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
};
-
- aliases {
- /* this allow the ethaddr uboot environmnet variable contents
- * to be added to the gmac1 device tree blob.
- */
- ethernet0 = &gmac1;
- };
-};
-
-&ethernet1 {
- status = "okay";
};
&gmac1 {
- phy-mode = "rgmii";
-
- rxd0-skew-ps = <0>;
- rxd1-skew-ps = <0>;
- rxd2-skew-ps = <0>;
- rxd3-skew-ps = <0>;
- txen-skew-ps = <0>;
- txc-skew-ps = <2600>;
- rxdv-skew-ps = <0>;
- rxc-skew-ps = <2000>;
+ status = "okay";
};
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 91f6ccf..222313f 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -86,11 +86,3 @@
};
};
};
-
-&ethernet0 {
- status = "okay";
-};
-
-&gmac0 {
- phy-mode = "gmii";
-};