diff options
author | Jon Mason <jon.mason@broadcom.com> | 2017-03-03 00:21:32 (GMT) |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-04-08 07:30:35 (GMT) |
commit | 1b442f9bdf9a4d1b9ba28a977c426041b8acbb3e (patch) | |
tree | ca8c920048bc365698f30a6580084564c940ee0e /arch/arm/configs/aspeed_g4_defconfig | |
parent | c1716f0c35cc0d8b58b4708af1f129440596edbc (diff) | |
download | linux-1b442f9bdf9a4d1b9ba28a977c426041b8acbb3e.tar.xz |
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
commit 0c2bf9f95983fe30aa2f6463cb761cd42c2d521a upstream.
GIC_PPI flags were misconfigured for the timers, resulting in errors
like:
[ 0.000000] GIC: PPI11 is secure or misconfigured
Changing them to being edge triggered corrects the issue
Suggested-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Fixes: d27509f1 ("ARM: BCM5301X: add dts files for BCM4708 SoC")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/configs/aspeed_g4_defconfig')
0 files changed, 0 insertions, 0 deletions