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authorLennert Buytenhek <buytenh@marvell.com>2009-11-24 17:33:52 (GMT)
committerNicolas Pitre <nico@fluxnic.net>2009-11-27 20:43:21 (GMT)
commit573a652fb0da50a1ff3fca2c67afd81138fd06d2 (patch)
treee393e667f733db56447c266d45e58accf141894f /arch/arm/configs
parentedabd38e1a017e922e3e3b485ee3ddb4df433aa4 (diff)
downloadlinux-573a652fb0da50a1ff3fca2c67afd81138fd06d2.tar.xz
ARM: Add Tauros2 L2 cache controller support
Support for the Tauros2 L2 cache controller as used with the PJ1 and PJ4 CPUs. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/configs')
-rw-r--r--arch/arm/configs/dove_defconfig4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/configs/dove_defconfig b/arch/arm/configs/dove_defconfig
index f2d1ea0..837bb52 100644
--- a/arch/arm/configs/dove_defconfig
+++ b/arch/arm/configs/dove_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.32-rc6
-# Tue Nov 24 13:48:39 2009
+# Tue Nov 24 13:51:23 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -207,6 +207,8 @@ CONFIG_ARM_THUMB=y
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_CACHE_TAUROS2=y
CONFIG_ARM_L1_CACHE_SHIFT=5
# CONFIG_ARM_ERRATA_411920 is not set