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| author | Mark Rutland <mark.rutland@arm.com> | 2012-12-19 16:33:24 (GMT) |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2014-07-02 14:48:25 (GMT) |
| commit | 3d1ff755e36705ad9ec96f740edc08d20c3e9a87 (patch) | |
| tree | fa383e35e84c16d07d4b535e7bb989ba0f4791e0 /arch/arm/kernel/perf_event_cpu.c | |
| parent | f929f5759f7e4dded314c23ad2b3b8abb5f35c4f (diff) | |
| download | linux-3d1ff755e36705ad9ec96f740edc08d20c3e9a87.tar.xz | |
arm: perf: clean up PMU names
The perf userspace tools can't handle dashes or spaces in PMU names,
which conflicts with the current naming scheme in the arm perf backend.
This prevents these PMUs from being accessed by name from the perf
tools. Additionally the ARMv6 pmus are named "v6", which does not fully
distinguish them in the sys/bus/event_source namespace.
This patch renames the PMUs consistently to a lower case form with
underscores, e.g. "armv6_1176", "armv7_cortex_a9". This is both readily
accepted by today's perf tool, and far easier to type than the
(apparently unused) convention in use previously. The OProfile name
conversion code is updated to handle this.
Due to a copy-paste error involving two "xscale1" entries, "xscale2" has
never been matched by the name OProfile name mapping. While we're
updating names, this is corrected.
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
[sachin: fixed missing semicolons in armv6 backend]
Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/perf_event_cpu.c')
| -rw-r--r-- | arch/arm/kernel/perf_event_cpu.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c index af9e35e..191aff0 100644 --- a/arch/arm/kernel/perf_event_cpu.c +++ b/arch/arm/kernel/perf_event_cpu.c @@ -233,8 +233,8 @@ static struct of_device_id cpu_pmu_of_device_ids[] = { {.compatible = "arm,cortex-a7-pmu", .data = armv7_a7_pmu_init}, {.compatible = "arm,cortex-a5-pmu", .data = armv7_a5_pmu_init}, {.compatible = "arm,arm11mpcore-pmu", .data = armv6mpcore_pmu_init}, - {.compatible = "arm,arm1176-pmu", .data = armv6pmu_init}, - {.compatible = "arm,arm1136-pmu", .data = armv6pmu_init}, + {.compatible = "arm,arm1176-pmu", .data = armv6_1176_pmu_init}, + {.compatible = "arm,arm1136-pmu", .data = armv6_1136_pmu_init}, {.compatible = "qcom,krait-pmu", .data = krait_pmu_init}, {}, }; @@ -260,9 +260,13 @@ static int probe_current_pmu(struct arm_pmu *pmu) if (implementor == ARM_CPU_IMP_ARM) { switch (part_number) { case ARM_CPU_PART_ARM1136: + ret = armv6_1136_pmu_init(pmu); + break; case ARM_CPU_PART_ARM1156: + ret = armv6_1156_pmu_init(pmu); + break; case ARM_CPU_PART_ARM1176: - ret = armv6pmu_init(pmu); + ret = armv6_1176_pmu_init(pmu); break; case ARM_CPU_PART_ARM11MPCORE: ret = armv6mpcore_pmu_init(pmu); |