diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-11 01:27:51 (GMT) |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-11 01:27:51 (GMT) |
commit | 12250d843e8489ee00b5b7726da855e51694e792 (patch) | |
tree | 905d1577a3d91cf9906628dd65648b0006c1893f /arch/arm/mach-at91/include | |
parent | da06a8d7bed2f3bfc12979384b2d1247ec4873db (diff) | |
parent | 62885f59a26195d9f6a3f8c795225dfbab62a110 (diff) | |
download | linux-12250d843e8489ee00b5b7726da855e51694e792.tar.xz |
Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux
Pull i2c-embedded changes from Wolfram Sang:
"The changes for i2c-embedded include:
- massive rework of the omap driver
- massive rework of the at91 driver. In fact, the old driver gets
removed; I am okay with this approach since the old driver was
depending on BROKEN and its limitations made it practically
unusable, so people used bitbanging instead. But even if there are
users, there is no platform_data or module parameter which would
need to be converted. It is just another driver doing I2C
transfers, just way better. Modifications of arch/arm/at91 related
files have proper acks from the maintainer.
- new driver for R-Car I2C
- devicetree and generic_clock conversions and fixes
- usual driver fixes and changes.
The rework patches have come a long way and lots of people have been
involved in creating/testing them. Most patches have been in
linux-next at least since 3.6-rc5. A few have been added in the last
week, I have to admit.
An unexpected (but welcome :)) peak in private life is the cause for
that. The "late" patches shouldn't cause any merge conflicts and I
will have a special eye on them during the stabilization phase. This
is an exception and I want to have the patches in place properly in
time again for the next kernels."
* 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux: (44 commits)
MXS: Implement DMA support into mxs-i2c
i2c: add Renesas R-Car I2C driver
i2c: s3c2410: use clk_prepare_enable and clk_disable_unprepare
ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraints
i2c: nomadik: Add Device Tree support to the Nomadik I2C driver
i2c: algo: pca: Fix chip reset function for PCA9665
i2c: mpc: Wait for STOP to hit the bus
i2c: davinci: preparation for switch to common clock framework
omap-i2c: fix incorrect log message when using a device tree
i2c: omap: sanitize exit path
i2c: omap: switch over to autosuspend API
i2c: omap: remove unnecessary pm_runtime_suspended check
i2c: omap: switch to threaded IRQ support
i2c: omap: remove redundant status read
i2c: omap: get rid of the "complete" label
i2c: omap: resize fifos before each message
i2c: omap: simplify IRQ exit path
i2c: omap: always return IRQ_HANDLED
i2c: omap: simplify errata check
i2c: omap: bus: add a receiver flag
...
Diffstat (limited to 'arch/arm/mach-at91/include')
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91_twi.h | 68 |
1 files changed, 0 insertions, 68 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91_twi.h b/arch/arm/mach-at91/include/mach/at91_twi.h deleted file mode 100644 index bb2880f..0000000 --- a/arch/arm/mach-at91/include/mach/at91_twi.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_twi.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Two-wire Interface (TWI) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_TWI_H -#define AT91_TWI_H - -#define AT91_TWI_CR 0x00 /* Control Register */ -#define AT91_TWI_START (1 << 0) /* Send a Start Condition */ -#define AT91_TWI_STOP (1 << 1) /* Send a Stop Condition */ -#define AT91_TWI_MSEN (1 << 2) /* Master Transfer Enable */ -#define AT91_TWI_MSDIS (1 << 3) /* Master Transfer Disable */ -#define AT91_TWI_SVEN (1 << 4) /* Slave Transfer Enable [SAM9260 only] */ -#define AT91_TWI_SVDIS (1 << 5) /* Slave Transfer Disable [SAM9260 only] */ -#define AT91_TWI_SWRST (1 << 7) /* Software Reset */ - -#define AT91_TWI_MMR 0x04 /* Master Mode Register */ -#define AT91_TWI_IADRSZ (3 << 8) /* Internal Device Address Size */ -#define AT91_TWI_IADRSZ_NO (0 << 8) -#define AT91_TWI_IADRSZ_1 (1 << 8) -#define AT91_TWI_IADRSZ_2 (2 << 8) -#define AT91_TWI_IADRSZ_3 (3 << 8) -#define AT91_TWI_MREAD (1 << 12) /* Master Read Direction */ -#define AT91_TWI_DADR (0x7f << 16) /* Device Address */ - -#define AT91_TWI_SMR 0x08 /* Slave Mode Register [SAM9260 only] */ -#define AT91_TWI_SADR (0x7f << 16) /* Slave Address */ - -#define AT91_TWI_IADR 0x0c /* Internal Address Register */ - -#define AT91_TWI_CWGR 0x10 /* Clock Waveform Generator Register */ -#define AT91_TWI_CLDIV (0xff << 0) /* Clock Low Divisor */ -#define AT91_TWI_CHDIV (0xff << 8) /* Clock High Divisor */ -#define AT91_TWI_CKDIV (7 << 16) /* Clock Divider */ - -#define AT91_TWI_SR 0x20 /* Status Register */ -#define AT91_TWI_TXCOMP (1 << 0) /* Transmission Complete */ -#define AT91_TWI_RXRDY (1 << 1) /* Receive Holding Register Ready */ -#define AT91_TWI_TXRDY (1 << 2) /* Transmit Holding Register Ready */ -#define AT91_TWI_SVREAD (1 << 3) /* Slave Read [SAM9260 only] */ -#define AT91_TWI_SVACC (1 << 4) /* Slave Access [SAM9260 only] */ -#define AT91_TWI_GACC (1 << 5) /* General Call Access [SAM9260 only] */ -#define AT91_TWI_OVRE (1 << 6) /* Overrun Error [AT91RM9200 only] */ -#define AT91_TWI_UNRE (1 << 7) /* Underrun Error [AT91RM9200 only] */ -#define AT91_TWI_NACK (1 << 8) /* Not Acknowledged */ -#define AT91_TWI_ARBLST (1 << 9) /* Arbitration Lost [SAM9260 only] */ -#define AT91_TWI_SCLWS (1 << 10) /* Clock Wait State [SAM9260 only] */ -#define AT91_TWI_EOSACC (1 << 11) /* End of Slave Address [SAM9260 only] */ - -#define AT91_TWI_IER 0x24 /* Interrupt Enable Register */ -#define AT91_TWI_IDR 0x28 /* Interrupt Disable Register */ -#define AT91_TWI_IMR 0x2c /* Interrupt Mask Register */ -#define AT91_TWI_RHR 0x30 /* Receive Holding Register */ -#define AT91_TWI_THR 0x34 /* Transmit Holding Register */ - -#endif - |