diff options
author | Albin Tonnerre <albin.tonnerre@free-electrons.com> | 2009-11-01 17:40:50 (GMT) |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-11-10 23:46:35 (GMT) |
commit | 1ea60cf7062271f0d53d09268726aa1544bf4836 (patch) | |
tree | 4e975655fa555fd2346ec50112fbbc8244cb03da /arch/arm/mach-at91/pm.h | |
parent | cd3abf98aeaec9b23a926159856b54a95707ee88 (diff) | |
download | linux-1ea60cf7062271f0d53d09268726aa1544bf4836.tar.xz |
ARM: 5778/1: AT91: Add cpuidle support
This patch adds the support for cpuidle on AT91 SoCs, taken from the
cpuidle support in mach-kirkwood.
cpuidle needs sdram_selfrefresh_enable and _disable, so move their
definition to a separate header file instead of duplicating the code
already used in pm.c.
Tested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91/pm.h')
-rw-r--r-- | arch/arm/mach-at91/pm.h | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h new file mode 100644 index 0000000..08322c4 --- /dev/null +++ b/arch/arm/mach-at91/pm.h @@ -0,0 +1,67 @@ +#ifdef CONFIG_ARCH_AT91RM9200 +#include <mach/at91rm9200_mc.h> + +/* + * The AT91RM9200 goes into self-refresh mode with this command, and will + * terminate self-refresh automatically on the next SDRAM access. + * + * Self-refresh mode is exited as soon as a memory access is made, but we don't + * know for sure when that happens. However, we need to restore the low-power + * mode if it was enabled before going idle. Restoring low-power mode while + * still in self-refresh is "not recommended", but seems to work. + */ + +static inline u32 sdram_selfrefresh_enable(void) +{ + u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); + + at91_sys_write(AT91_SDRAMC_LPR, 0); + at91_sys_write(AT91_SDRAMC_SRR, 1); + return saved_lpr; +} + +#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) + +#elif defined(CONFIG_ARCH_AT91CAP9) +#include <mach/at91cap9_ddrsdr.h> + + +static inline u32 sdram_selfrefresh_enable(void) +{ + u32 saved_lpr, lpr; + + saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR); + + lpr = saved_lpr & ~AT91_DDRSDRC_LPCB; + at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH); + return saved_lpr; +} + +#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr) + +#else +#include <mach/at91sam9_sdramc.h> + +#ifdef CONFIG_ARCH_AT91SAM9263 +/* + * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; + * handle those cases both here and in the Suspend-To-RAM support. + */ +#define AT91_SDRAMC AT91_SDRAMC0 +#warning Assuming EB1 SDRAM controller is *NOT* used +#endif + +static inline u32 sdram_selfrefresh_enable(void) +{ + u32 saved_lpr, lpr; + + saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); + + lpr = saved_lpr & ~AT91_SDRAMC_LPCB; + at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); + return saved_lpr; +} + +#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) + +#endif |