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| author | Alexander Shiyan <shc_work@mail.ru> | 2012-05-12 22:40:57 (GMT) |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-05-13 19:53:03 (GMT) |
| commit | 94bd32792e905ae25f63491f06d7d3018b350dd2 (patch) | |
| tree | 354e3637ab09679d1a31feceb640cf095bc11332 /arch/arm/mach-clps711x/include | |
| parent | 304b2c684e42af5b72d643322f783d88538dc817 (diff) | |
| download | linux-94bd32792e905ae25f63491f06d7d3018b350dd2.tar.xz | |
ARM: clps711x: Combine header files into one for clps711x-targets
Current ARM7 Cirrus Logic product line contains only 3 cpu.
EP7312 - Fully functional.
EP7309 - Missing SDRAM interface.
EP7311 - Missing DAI.
It makes no sense to separate the header files to identify these differences,
it is only necessary to keep in mind the presence or lack of any features of
a specific CPU when writing code.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-clps711x/include')
| -rw-r--r-- | arch/arm/mach-clps711x/include/mach/hardware.h | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h index 1026ac9..d31fc79 100644 --- a/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/arch/arm/mach-clps711x/include/mach/hardware.h @@ -61,32 +61,11 @@ #define CS7_PHYS_BASE (0x00000000) #endif -#if defined (CONFIG_ARCH_EP7211) - -#include <asm/hardware/ep7211.h> - -#elif defined (CONFIG_ARCH_EP7212) - -#include <asm/hardware/ep7212.h> - -#endif - #define SYSPLD_VIRT_BASE 0xfe000000 #define SYSPLD_BASE SYSPLD_VIRT_BASE -#if defined (CONFIG_ARCH_AUTCPU12) - -#include <asm/hardware/ep7212.h> -#include <asm/hardware/cs89712.h> - -#endif - - #if defined (CONFIG_ARCH_CDB89712) -#include <asm/hardware/ep7212.h> -#include <asm/hardware/cs89712.h> - #define ETHER_START 0x20000000 #define ETHER_SIZE 0x1000 #define ETHER_BASE 0xfe000000 @@ -149,8 +128,6 @@ #if defined (CONFIG_ARCH_CEIVA) -#include <asm/hardware/ep7212.h> - /* * The two flash banks are wired to chip selects 0 and 1. This is the mapping * for them. |