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authorJames Hogan <james.hogan@imgtec.com>2012-10-09 09:54:43 (GMT)
committerJames Hogan <james.hogan@imgtec.com>2013-03-02 20:09:45 (GMT)
commitac919f0883e53d7785745566692c8a0620abd7ea (patch)
tree521a0b0ddcab5176a1998d0b7b9faefde6e3f0ae /arch/arm/mach-davinci/aemif.c
parenta2c5d4ed92bbc02ff4a37efc2adffe7d145abe4f (diff)
downloadlinux-ac919f0883e53d7785745566692c8a0620abd7ea.tar.xz
metag: Traps
Add trap code for metag. At the lowest level Meta traps (and return from interrupt instruction - RTI) simply swap the PC and PCX registers and optionally toggle the interrupt status bit (ISTAT). Low level TBX code in tbipcx.S handles the core context save, determine the TBX signal number based on the core trigger that fired (using the TXSTATI status register), and call TBX signal handlers (mostly in traps.c) via a vector table. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Al Viro <viro@zeniv.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-davinci/aemif.c')
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