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author | Arnd Bergmann <arnd@arndb.de> | 2016-03-02 22:30:17 (GMT) |
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committer | Arnd Bergmann <arnd@arndb.de> | 2016-03-02 22:30:17 (GMT) |
commit | f3a186fbfd413f2453c511da2dbcdc594c87dbde (patch) | |
tree | 7a35123458eb9904f8027c3bc15057e607707c2d /arch/arm/mach-imx/mach-mx27ads.c | |
parent | e91fb3bd757569aca48785358a4adbf41334d382 (diff) | |
parent | d2443b2e6167e80eca9a068d5ecc0e6f081b3ca4 (diff) | |
download | linux-f3a186fbfd413f2453c511da2dbcdc594c87dbde.tar.xz |
Merge tag 'imx-soc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Merge "i.MX SoC update for 4.6" from Shawn Guo:
- Enable big endian mode support for i.MX platform
- Add support for i.MX6QP SoC which is the latest i.MX6 family addition
- Add basic suspend/resume support for i.MX25
- A couple of i.MX7D support updates
- A few random code cleanups
* tag 'imx-soc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: Make reset_control_ops const
ARM: imx: Do L2 errata only if the L2 cache isn't enabled
ARM: imx: select ARM_CPU_SUSPEND only for imx6
ARM: mx25: Add basic suspend/resume support
ARM: imx: Add msl code support for imx6qp
ARM: imx: enable big endian mode
ARM: imx: use endian-safe readl/readw/writel/writew
ARM: imx7d: correct chip version information
ARM: imx: select HAVE_ARM_ARCH_TIMER if selected i.MX7D
ARM: imx6: fix cleanup path in imx6q_suspend_init()
Diffstat (limited to 'arch/arm/mach-imx/mach-mx27ads.c')
-rw-r--r-- | arch/arm/mach-imx/mach-mx27ads.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index eb1c347..267fad2 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c @@ -202,9 +202,9 @@ static struct i2c_board_info mx27ads_i2c_devices[] = { static void vgpio_set(struct gpio_chip *chip, unsigned offset, int value) { if (value) - __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_SET_REG); + imx_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_SET_REG); else - __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG); + imx_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG); } static int vgpio_dir_out(struct gpio_chip *chip, unsigned offset, int value) @@ -364,7 +364,7 @@ static void __init mx27ads_timer_init(void) { unsigned long fref = 26000000; - if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0) + if ((imx_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0) fref = 27000000; mx27_clocks_init(fref); |