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author | Brian Swetland <swetland@google.com> | 2008-09-09 18:04:14 (GMT) |
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committer | Brian Swetland <swetland@google.com> | 2008-10-22 09:41:00 (GMT) |
commit | 600f7cfebeef74a6ba961c507079e3629da5dd7a (patch) | |
tree | bac251da969e1e4d2f277793e3ba906b25b7905e /arch/arm/mach-msm/clock.h | |
parent | bcc0f6af0798e60e7527485f7125ed26632ce698 (diff) | |
download | linux-600f7cfebeef74a6ba961c507079e3629da5dd7a.tar.xz |
[ARM] msm: clock: provide clk_*() api support for
Makes use of the proc_comm interface to provide clock control on
MSM7X01A family SoCs.
Signed-off-by: Brian Swetland <swetland@google.com>
Diffstat (limited to 'arch/arm/mach-msm/clock.h')
-rw-r--r-- | arch/arm/mach-msm/clock.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h new file mode 100644 index 0000000..f875e15 --- /dev/null +++ b/arch/arm/mach-msm/clock.h @@ -0,0 +1,48 @@ +/* arch/arm/mach-msm/clock.h + * + * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2007 QUALCOMM Incorporated + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __ARCH_ARM_MACH_MSM_CLOCK_H +#define __ARCH_ARM_MACH_MSM_CLOCK_H + +#include <linux/list.h> + +#define CLKFLAG_INVERT 0x00000001 +#define CLKFLAG_NOINVERT 0x00000002 +#define CLKFLAG_NONEST 0x00000004 +#define CLKFLAG_NORESET 0x00000008 + +#define CLK_FIRST_AVAILABLE_FLAG 0x00000100 +#define CLKFLAG_USE_MIN_MAX_TO_SET 0x00000200 +#define CLKFLAG_AUTO_OFF 0x00000400 + +struct clk { + uint32_t id; + uint32_t count; + uint32_t flags; + const char *name; + struct list_head list; + struct device *dev; +}; + +#define A11S_CLK_CNTL_ADDR (MSM_CSR_BASE + 0x100) +#define A11S_CLK_SEL_ADDR (MSM_CSR_BASE + 0x104) +#define A11S_VDD_SVS_PLEVEL_ADDR (MSM_CSR_BASE + 0x124) + +extern struct clk msm_clocks[]; +extern unsigned msm_num_clocks; + +#endif + |