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author | Jeff Ohlstein <johlstei@codeaurora.org> | 2010-12-02 20:05:12 (GMT) |
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committer | David Brown <davidb@codeaurora.org> | 2011-01-07 23:54:44 (GMT) |
commit | 94790ec25fdd51dc4126cc176f2e104f80f87fcb (patch) | |
tree | 6df4ba7d9e71459817b3a4d39b9094ac63698f6c /arch/arm/mach-msm/io.c | |
parent | 7b181446c68768e2f3231a0885095ee41261dcde (diff) | |
download | linux-94790ec25fdd51dc4126cc176f2e104f80f87fcb.tar.xz |
msm: timer: SMP timer support for msm
The msm provides timer hardware that is private to each core. Each
timer has separate counter and match registers, so we create separate
clock_event_devices for each core. For the global clocksource, use
cpu 0's counter.
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/io.c')
-rw-r--r-- | arch/arm/mach-msm/io.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index f912d7b..800f327 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c @@ -105,6 +105,7 @@ static struct map_desc msm8x60_io_desc[] __initdata = { MSM_DEVICE(QGIC_DIST), MSM_DEVICE(QGIC_CPU), MSM_DEVICE(TMR), + MSM_DEVICE(TMR0), MSM_DEVICE(ACC), MSM_DEVICE(GCC), }; |