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authorStephen Boyd <sboyd@codeaurora.org>2012-09-05 19:28:51 (GMT)
committerDavid Brown <davidb@codeaurora.org>2012-09-13 18:14:29 (GMT)
commit66a8950949c12a2600ff62e78b24f42ef8f6d28e (patch)
treec348c8ba6bf082bafaa44e390f3129ce2dd45b4c /arch/arm/mach-msm/timer.c
parente8ea1ea90bfd90d3047924b77a3f76cf2147ada1 (diff)
downloadlinux-66a8950949c12a2600ff62e78b24f42ef8f6d28e.tar.xz
ARM: msm: Don't touch GIC registers outside of GIC code
The MSM code has some antiquated register writes to set up the PPIs to be edge triggered. Now that we have the percpu irq interface we don't need this code so let's remove it and update the percpu irq user (msm_timer) to set the irq type. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/timer.c')
-rw-r--r--arch/arm/mach-msm/timer.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 81280825..36bbc60 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -151,7 +151,7 @@ static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
*__this_cpu_ptr(msm_evt.percpu_evt) = evt;
clockevents_register_device(evt);
- enable_percpu_irq(evt->irq, 0);
+ enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING);
return 0;
}
@@ -219,7 +219,7 @@ static void __init msm_timer_init(void)
res = request_percpu_irq(ce->irq, msm_timer_interrupt,
ce->name, msm_evt.percpu_evt);
if (!res) {
- enable_percpu_irq(ce->irq, 0);
+ enable_percpu_irq(ce->irq, IRQ_TYPE_EDGE_RISING);
#ifdef CONFIG_LOCAL_TIMERS
local_timer_register(&msm_local_timer_ops);
#endif