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author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2012-09-26 16:02:48 (GMT) |
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committer | Jason Cooper <jason@lakedaemon.net> | 2012-11-27 15:35:05 (GMT) |
commit | d792b1e94dfad4bce0acd4ac03d361b0038dc8d7 (patch) | |
tree | 87dcc447186bb130ccf0720527b150aa4b60328e /arch/arm/mach-mvebu | |
parent | 56580bb422e5f542da19c057f348dd39634138e7 (diff) | |
download | linux-d792b1e94dfad4bce0acd4ac03d361b0038dc8d7.tar.xz |
arm: mvebu: add L2 cache support
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-and-reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-and-reviewed-by: Lior Amsalem <alior@marvell.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu')
-rw-r--r-- | arch/arm/mach-mvebu/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/irq-armada-370-xp.c | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index c934e1d..440b13e 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -22,6 +22,7 @@ config MACH_ARMADA_370_XP bool select ARMADA_370_XP_TIMER select HAVE_SMP + select CACHE_L2X0 select CPU_PJ4B config MACH_ARMADA_370 diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c index 549b684..8e3fb08 100644 --- a/arch/arm/mach-mvebu/irq-armada-370-xp.c +++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c @@ -25,6 +25,7 @@ #include <asm/mach/arch.h> #include <asm/exception.h> #include <asm/smp_plat.h> +#include <asm/hardware/cache-l2x0.h> /* Interrupt Controller Registers Map */ #define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48) @@ -210,4 +211,7 @@ static const struct of_device_id mpic_of_match[] __initconst = { void __init armada_370_xp_init_irq(void) { of_irq_init(mpic_of_match); +#ifdef CONFIG_CACHE_L2X0 + l2x0_of_init(0, ~0UL); +#endif } |