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author | Andrzej Zaborowski <balrog@zabor.org> | 2006-12-07 01:13:48 (GMT) |
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committer | Tony Lindgren <tony@atomide.com> | 2007-03-02 09:47:08 (GMT) |
commit | ef557d76dfbdf74c240f76be15fa90d62f1ae61f (patch) | |
tree | 406ed94a8ffab308910607dc6c9183dbe449539c /arch/arm/mach-omap1/irq.c | |
parent | 562aa1d4c6a874373f9a48ac184f662fbbb06a04 (diff) | |
download | linux-ef557d76dfbdf74c240f76be15fa90d62f1ae61f.tar.xz |
ARM: OMAP: correct misc 15xx and non-15xx platform code
Disable accesses to SOFT_REQ_REG2 and ULPD_SOFT_DISABLE_REQ_REG
registers for 15xx processors that don't have these registers. Enable
level 2 interrupt handler for processors that identify as OMAP 15xx
(e.g 310) and not 1510 specifically. Also fix the following compiler
warning (only visible with CONFIG_OMAP_RESET_CLOCKS):
arch/arm/mach-omap1/clock.c: In function 'omap1_clk_disable_unused':
arch/arm/mach-omap1/clock.c:634: warning: 'return' with a value, in
function returning void
Signed-off-by: Andrzej Zaborowski <balrog@zabor.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap1/irq.c')
-rw-r--r-- | arch/arm/mach-omap1/irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 6383a12..410d3e7 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -238,7 +238,7 @@ void __init omap_init_irq(void) if (cpu_is_omap730()) omap_unmask_irq(INT_730_IH2_IRQ); - else if (cpu_is_omap1510()) + else if (cpu_is_omap15xx()) omap_unmask_irq(INT_1510_IH2_IRQ); else if (cpu_is_omap16xx()) omap_unmask_irq(INT_1610_IH2_IRQ); |