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authorTony Lindgren <tony@atomide.com>2012-09-13 04:29:07 (GMT)
committerTony Lindgren <tony@atomide.com>2012-09-13 04:29:07 (GMT)
commit11964f53eb4d9ce59a058be9999d9cfcb1ced878 (patch)
treeda3b0469faa749b7ac42ca617980d3f4a234af75 /arch/arm/mach-omap2/clkt_dpll.c
parent68cb700c59fae6cd539c9dc1e9f2584f671935a0 (diff)
parent83c115426818378370b8cf2be16ca19bdcdc2ac4 (diff)
downloadlinux-11964f53eb4d9ce59a058be9999d9cfcb1ced878.tar.xz
Merge tag 'omap-devel-a2-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-am33xx
AM33xx hwmod data and miscellaneous clock and hwmod fixes. AM33xx should now boot on mainline after this is applied, according to Vaibhav. This second version includes trailing commas at the end of structure records at Tony's request. It also adds a OMAP_INTC_START macro expansion to each IRQ number to make the sparseirq conversion easier. Basic build, boot, and PM test transcripts are here: http://www.pwsan.com/omap/testlogs/am33xx_hwmod_clock_devel_3.7/20120912165952/
Diffstat (limited to 'arch/arm/mach-omap2/clkt_dpll.c')
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index ae624c3..0bf0ec3 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -211,7 +211,7 @@ void omap2_init_dpll_parent(struct clk *clk)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS)
clk_reparent(clk, dd->clk_bypass);
- } else if (cpu_is_omap44xx()) {
+ } else if (soc_is_am33xx() || cpu_is_omap44xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS)
@@ -257,7 +257,7 @@ u32 omap2_get_dpll_rate(struct clk *clk)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS)
return dd->clk_bypass->rate;
- } else if (cpu_is_omap44xx()) {
+ } else if (soc_is_am33xx() || cpu_is_omap44xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS)