Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Arnd Bergmann:
 "New and updated SoC support.  Among the things new for this release
  are:

   - at91: Added support for the new SAMA5D4 SoC, following the earlier
     SAMA5D3
   - bcm: Added support for BCM63XX family of DSL SoCs
   - hisi: Added support for HiP04 server-class SoC
   - meson: Initial support for the Amlogic Meson6 (aka 8726MX) platform
   - shmobile: added support for new r8a7794 (R-Car E2) automotive SoC

  Noteworthy changes to existing SoC support are:

   - imx: convert i.MX1 to device tree
   - omap: lots of power management work
   - omap: base support to enable moving to standard UART driver
   - shmobile: lots of progress for multiplatform support, still
     ongoing"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (171 commits)
  ARM: hisi: depend on ARCH_MULTI_V7
  CNS3xxx: Fix debug UART.
  ARM: at91: fix nommu build regression
  ARM: meson: add basic support for MesonX SoCs
  ARM: meson: debug: add debug UART for earlyprintk support
  irq: Export handle_fasteoi_irq
  ARM: mediatek: Add earlyprintk support for mt6589
  ARM: hisi: Fix platmcpm compilation when ARMv6 is selected
  ARM: debug: fix alphanumerical order on debug uarts
  ARM: at91: document Atmel SMART compatibles
  ARM: at91: add sama5d4 support to sama5_defconfig
  ARM: at91: dt: add device tree file for SAMA5D4ek board
  ARM: at91: dt: add device tree file for SAMA5D4 SoC
  ARM: at91: SAMA5D4 SoC detection code and low level routines
  ARM: at91: introduce basic SAMA5D4 support
  clk: at91: add a driver for the h32mx clock
  ARM: pxa3xx: provide specific platform_devices for all ssp ports
  ARM: pxa: ssp: provide platform_device_id for PXA3xx
  ARM: OMAP4+: Remove static iotable mappings for SRAM
  ARM: OMAP4+: Move SRAM data to DT
  ...

1 files changed, 19 insertions, 1 deletions

diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 37843a7..f961c46 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -32,6 +32,7 @@
 #include "soc.h"
 #include "omap4-sar-layout.h"
 #include "common.h"
+#include "pm.h"
 
 #define AM43XX_NR_REG_BANKS	7
 #define AM43XX_IRQS		224
@@ -381,7 +382,7 @@ static struct notifier_block irq_notifier_block = {
 static void __init irq_pm_init(void)
 {
 	/* FIXME: Remove this when MPU OSWR support is added */
-	if (!soc_is_omap54xx())
+	if (!IS_PM44XX_ERRATUM(PM_OMAP4_CPU_OSWR_DISABLE))
 		cpu_pm_register_notifier(&irq_notifier_block);
 }
 #else
@@ -406,6 +407,7 @@ int __init omap_wakeupgen_init(void)
 {
 	int i;
 	unsigned int boot_cpu = smp_processor_id();
+	u32 val;
 
 	/* Not supported on OMAP4 ES1.0 silicon */
 	if (omap_rev() == OMAP4430_REV_ES1_0) {
@@ -451,6 +453,22 @@ int __init omap_wakeupgen_init(void)
 	for (i = 0; i < max_irqs; i++)
 		irq_target_cpu[i] = boot_cpu;
 
+	/*
+	 * Enables OMAP5 ES2 PM Mode using ES2_PM_MODE in AMBA_IF_MODE
+	 * 0x0:	ES1 behavior, CPU cores would enter and exit OFF mode together.
+	 * 0x1:	ES2 behavior, CPU cores are allowed to enter/exit OFF mode
+	 * independently.
+	 * This needs to be set one time thanks to always ON domain.
+	 *
+	 * We do not support ES1 behavior anymore. OMAP5 is assumed to be
+	 * ES2.0, and the same is applicable for DRA7.
+	 */
+	if (soc_is_omap54xx() || soc_is_dra7xx()) {
+		val = __raw_readl(wakeupgen_base + OMAP_AMBA_IF_MODE);
+		val |= BIT(5);
+		omap_smc1(OMAP5_MON_AMBA_IF_INDEX, val);
+	}
+
 	irq_hotplug_init();
 	irq_pm_init();