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author | Victor Kamensky <victor.kamensky@linaro.org> | 2014-04-15 17:37:46 (GMT) |
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committer | Tony Lindgren <tony@atomide.com> | 2014-05-08 14:09:53 (GMT) |
commit | edfaf05c2fcb853fcf35f12aeb9c340f5913337f (patch) | |
tree | f3d0d7ca941855237953f65680932a8a433b0ed4 /arch/arm/mach-omap2/prm2xxx.h | |
parent | 89ca3b881987f5a4be4c5dbaa7f0df12bbdde2fd (diff) | |
download | linux-edfaf05c2fcb853fcf35f12aeb9c340f5913337f.tar.xz |
ARM: OMAP2+: raw read and write endian fix
All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
Need to use endian neutral functions to read/write h/w registers.
I.e instead of __raw_read[lw] and __raw_write[lw] functions code
need to use read[lw]_relaxed and write[lw]_relaxed functions.
If the first simply reads/writes register, the second will byteswap
it if host operates in BE mode.
Changes are trivial sed like replacement of __raw_xxx functions
with xxx_relaxed variant.
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/prm2xxx.h')
-rw-r--r-- | arch/arm/mach-omap2/prm2xxx.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h index 3194dd8..d2cb636 100644 --- a/arch/arm/mach-omap2/prm2xxx.h +++ b/arch/arm/mach-omap2/prm2xxx.h @@ -27,7 +27,7 @@ /* * OMAP2-specific global PRM registers - * Use __raw_{read,write}l() with these registers. + * Use {read,write}l_relaxed() with these registers. * * With a few exceptions, these are the register names beginning with * PRCM_* on 24xx. (The exceptions are the IRQSTATUS and IRQENABLE |