diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 13:06:38 (GMT) |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 21:46:08 (GMT) |
commit | e425382ed90d221ef9031a1b2d97d9bfedcf90c3 (patch) | |
tree | ca36882dba4caf8a9726ed67216251360c80ef59 /arch/arm/mach-s3c2410/s3c2410.c | |
parent | c3391e36d697c997b6afeb045071e0be95219a3e (diff) | |
download | linux-e425382ed90d221ef9031a1b2d97d9bfedcf90c3.tar.xz |
[ARM] S3C24XX: Update clock data on resume
Update the clock settings on resume for suspend/resume
support so that if the boot loader changes anything or
the system's PLL is reset then we return with the correct
settings.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c2410/s3c2410.c')
-rw-r--r-- | arch/arm/mach-s3c2410/s3c2410.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index 4e23bc0..feb141b1 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c @@ -16,6 +16,7 @@ #include <linux/list.h> #include <linux/timer.h> #include <linux/init.h> +#include <linux/clk.h> #include <linux/sysdev.h> #include <linux/serial_core.h> #include <linux/platform_device.h> @@ -28,6 +29,8 @@ #include <mach/hardware.h> #include <asm/irq.h> +#include <plat/cpu-freq.h> + #include <mach/regs-clock.h> #include <plat/regs-serial.h> @@ -65,13 +68,19 @@ void __init s3c2410_map_io(void) iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); } -void __init s3c2410_init_clocks(int xtal) +void __init_or_cpufreq s3c2410_setup_clocks(void) { + struct clk *xtal_clk; unsigned long tmp; + unsigned long xtal; unsigned long fclk; unsigned long hclk; unsigned long pclk; + xtal_clk = clk_get(NULL, "xtal"); + xtal = clk_get_rate(xtal_clk); + clk_put(xtal_clk); + /* now we've got our machine bits initialised, work out what * clocks we've got */ @@ -93,7 +102,13 @@ void __init s3c2410_init_clocks(int xtal) * console to use them */ - s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); + s3c24xx_setup_clocks(fclk, hclk, pclk); +} + +void __init s3c2410_init_clocks(int xtal) +{ + s3c24xx_register_baseclocks(xtal); + s3c2410_setup_clocks(); s3c2410_baseclk_add(); } |