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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-25 23:02:14 (GMT) |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-25 23:02:14 (GMT) |
| commit | 8348ad7c178627a302d579906096108b02052730 (patch) | |
| tree | 253a309819de4cd9d913594950e7c1764f7ba5c7 /arch/arm/mach-shmobile/intc-sh7372.c | |
| parent | 9948d378b99b06f6f34164dd8ff827e228ae9251 (diff) | |
| parent | 170c7ab58f41c526c54e9dd04044857d5d73f9e6 (diff) | |
| download | linux-8348ad7c178627a302d579906096108b02052730.tar.xz | |
Merge branch 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
ARM: mach-shmobile: AG5EVM LCDC / MIPI-DSI platform data
ARM: mach-shmobile: sh73a0 CPGA fix for PLL CFG bit
ARM: mach-shmobile: mackerel: clarify shdi/mmcif switch settings
ARM: mach-shmobile: sh73a0 CPGA fix for IrDA MSTP
ARM: mach-shmobile: sh73a0 CPGA fix for FRQCRA M3
ARM: mach-shmobile: remove sh7367 on-chip set_irq_type()
ARM: mach-shmobile: sh7372 INTCS MFIS2 interrupt update
ARM: mach-shmobile: ag5evm: Add IrDA support
ARM: mach-shmobile: clock-sh7372: fixup pllc2 set_rate
mmc: sh_mmcif: Convert to __raw_xxx() I/O accessors.
ARM: mach-shmobile: ag5evm requires GPIOLIB
ARM: mach-shmobile: fix cpu_base of gic_init() on sh73a0
Diffstat (limited to 'arch/arm/mach-shmobile/intc-sh7372.c')
| -rw-r--r-- | arch/arm/mach-shmobile/intc-sh7372.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c index f78a1ea..ca5f9d1 100644 --- a/arch/arm/mach-shmobile/intc-sh7372.c +++ b/arch/arm/mach-shmobile/intc-sh7372.c @@ -365,6 +365,7 @@ static struct intc_desc intca_desc __initdata = { enum { UNUSED_INTCS = 0, + ENABLED_INTCS, INTCS, @@ -413,7 +414,7 @@ enum { CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, - /* MFIS2 */ + MFIS2_INTCS, /* Priority always enabled using ENABLED_INTCS */ CPORTS2R, /* CEC */ JPU6E, @@ -477,7 +478,7 @@ static struct intc_vect intcs_vectors[] = { INTCS_VECT(CMT4, 0x1980), INTCS_VECT(DSITX1_DSITX1_0, 0x19a0), INTCS_VECT(DSITX1_DSITX1_1, 0x19c0), - /* MFIS2 */ + INTCS_VECT(MFIS2_INTCS, 0x1a00), INTCS_VECT(CPORTS2R, 0x1a20), /* CEC */ INTCS_VECT(JPU6E, 0x1a80), @@ -543,7 +544,7 @@ static struct intc_mask_reg intcs_mask_registers[] = { { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } }, { 0xffd5019c, 0xffd501dc, 8, /* IMR7SA3 / IMCR7SA3 */ - { 0, CPORTS2R, 0, 0, + { MFIS2_INTCS, CPORTS2R, 0, 0, JPU6E, 0, 0, 0 } }, { 0xffd20104, 0, 16, /* INTAMASK */ { 0, 0, 0, 0, 0, 0, 0, 0, @@ -571,7 +572,8 @@ static struct intc_prio_reg intcs_prio_registers[] = { { 0xffd50030, 0, 16, 4, /* IPRMS3 */ { TMU1, 0, 0, 0 } }, { 0xffd50034, 0, 16, 4, /* IPRNS3 */ { CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, 0 } }, - { 0xffd50038, 0, 16, 4, /* IPROS3 */ { 0, CPORTS2R, 0, 0 } }, + { 0xffd50038, 0, 16, 4, /* IPROS3 */ { ENABLED_INTCS, CPORTS2R, + 0, 0 } }, { 0xffd5003c, 0, 16, 4, /* IPRPS3 */ { JPU6E, 0, 0, 0 } }, }; @@ -590,6 +592,7 @@ static struct resource intcs_resources[] __initdata = { static struct intc_desc intcs_desc __initdata = { .name = "sh7372-intcs", + .force_enable = ENABLED_INTCS, .resource = intcs_resources, .num_resources = ARRAY_SIZE(intcs_resources), .hw = INTC_HW_DESC(intcs_vectors, intcs_groups, intcs_mask_registers, |