diff options
| author | Magnus Damm <damm@opensource.se> | 2011-01-06 10:38:47 (GMT) |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2011-01-12 05:44:25 (GMT) |
| commit | 969f9a19122141465d02a889d7d1de34eb53e609 (patch) | |
| tree | de13c0873ec37475fd88fe56c8075d3c9910a188 /arch/arm/mach-shmobile | |
| parent | 330e4e7169be3d587dcd7408003197a6f1d66dd0 (diff) | |
| download | linux-969f9a19122141465d02a889d7d1de34eb53e609.tar.xz | |
ARM: mach-shmobile: sh7367 Enable SDIO IRQs
This patch enables interrupt generation for SDIO IRQs
of the SDHI block on the sh7367 aka G3 processor. Use
together with a recent SDHI driver using TMIO_MMC_SDIO_IRQ
and with the MMC_CAP_SDIO_IRQ flag in the board code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm/mach-shmobile')
| -rw-r--r-- | arch/arm/mach-shmobile/intc-sh7367.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c index 1a20c48..2fe9704 100644 --- a/arch/arm/mach-shmobile/intc-sh7367.c +++ b/arch/arm/mach-shmobile/intc-sh7367.c @@ -189,10 +189,10 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { { SCIFB, SCIFA5, SCIFA4, MSIOF1, 0, 0, MSIOF2, 0 } }, { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ - { DISABLED, DISABLED, ENABLED, ENABLED, + { DISABLED, ENABLED, ENABLED, ENABLED, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ - { DISABLED, DISABLED, ENABLED, ENABLED, + { DISABLED, ENABLED, ENABLED, ENABLED, TTI20, USBDMAC_USHDMI, SPU, SIU } }, { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, @@ -207,7 +207,7 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { { 0, 0, TPU0, TPU1, TPU2, TPU3, TPU4, 0 } }, { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */ - { DISABLED, DISABLED, ENABLED, ENABLED, + { DISABLED, ENABLED, ENABLED, ENABLED, MISTY, CMT3, RWDT1, RWDT0 } }, }; |