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| author | Arnd Bergmann <arnd@arndb.de> | 2012-09-14 20:22:00 (GMT) |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-09-19 13:19:17 (GMT) |
| commit | 009a01e347b91123c13e85d70b9b4fbc72c67bfd (patch) | |
| tree | ecc72262dc47c8ddc79d6b312bb860cba189c135 /arch/arm/mach-spear13xx/include | |
| parent | b55056ea09d71c935d4ae828e97d4eaed4feb2db (diff) | |
| download | linux-009a01e347b91123c13e85d70b9b4fbc72c67bfd.tar.xz | |
ARM: spear13xx: use __iomem pointers for MMIO
ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: spear-devel@list.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-spear13xx/include')
| -rw-r--r-- | arch/arm/mach-spear13xx/include/mach/spear.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h index 65f27de..07d90ac 100644 --- a/arch/arm/mach-spear13xx/include/mach/spear.h +++ b/arch/arm/mach-spear13xx/include/mach/spear.h @@ -17,26 +17,26 @@ #include <asm/memory.h> #define PERIP_GRP2_BASE UL(0xB3000000) -#define VA_PERIP_GRP2_BASE UL(0xFE000000) +#define VA_PERIP_GRP2_BASE IOMEM(0xFE000000) #define MCIF_SDHCI_BASE UL(0xB3000000) #define SYSRAM0_BASE UL(0xB3800000) -#define VA_SYSRAM0_BASE UL(0xFE800000) +#define VA_SYSRAM0_BASE IOMEM(0xFE800000) #define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) #define PERIP_GRP1_BASE UL(0xE0000000) -#define VA_PERIP_GRP1_BASE UL(0xFD000000) +#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) #define UART_BASE UL(0xE0000000) -#define VA_UART_BASE UL(0xFD000000) +#define VA_UART_BASE IOMEM(0xFD000000) #define SSP_BASE UL(0xE0100000) #define MISC_BASE UL(0xE0700000) -#define VA_MISC_BASE IOMEM(UL(0xFD700000)) +#define VA_MISC_BASE IOMEM(0xFD700000) #define A9SM_AND_MPMC_BASE UL(0xEC000000) -#define VA_A9SM_AND_MPMC_BASE UL(0xFC000000) +#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) /* A9SM peripheral offsets */ #define A9SM_PERIP_BASE UL(0xEC800000) -#define VA_A9SM_PERIP_BASE UL(0xFC800000) +#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) #define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) #define L2CC_BASE UL(0xED000000) |