summaryrefslogtreecommitdiff
path: root/arch/arm/mach-uniphier/headsmp.S
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2016-10-08 04:18:42 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2016-10-08 04:18:42 (GMT)
commit66f2c6d9525baa7534640f09f406cd2987e0f287 (patch)
treec4874177b3dd0e2d0913cb0f898f74412f2801c1 /arch/arm/mach-uniphier/headsmp.S
parenta771151a8323a5ca81f443a9a439851b8a872c85 (diff)
parente40454d3f444ba7f8cc78dd985a1414a5945757c (diff)
downloadlinux-66f2c6d9525baa7534640f09f406cd2987e0f287.tar.xz
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "These are updates for platform specific code on 32-bit ARM machines, essentially anything that can not (yet) be expressed using DT files. Noteworthy changes include: - We get support for running in big-endian mode on two platforms: sunxi (Allwinner) and s3c24xx (old Samsung). - The recently added Uniphier platform now uses standard PSCI methods for SMP booting and we remove support for old bootloader versions that did not support it yet. - In sunxi, we gain support for the "Nextthing GR8" SoC, which is a close relative of the Allwinner A13 and R8 chips. - PXA completes its move over to the generic dmaengine framework and removes its old private API - mach-bcm gains support for BCM47189/BCM53573, their first ARM SoC with integrated 802.11ac wireless networking" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) ARM: imx legacy: pca100: move peripheral initialization to .init_late ARM: imx legacy: mx27ads: move peripheral initialization to .init_late ARM: imx legacy: mx21ads: move peripheral initialization to .init_late ARM: imx legacy: pcm043: move peripheral initialization to .init_late ARM: imx legacy: mx35-3ds: move peripheral initialization to .init_late ARM: imx legacy: mx27-3ds: move peripheral initialization to .init_late ARM: imx legacy: imx27-visstrim-m10: move peripheral initialization to .init_late ARM: imx legacy: vpr200: move peripheral initialization to .init_late ARM: imx legacy: mx31moboard: move peripheral initialization to .init_late ARM: imx legacy: armadillo5x0: move peripheral initialization to .init_late ARM: imx legacy: qong: move peripheral initialization to .init_late ARM: imx legacy: mx31-3ds: move peripheral initialization to .init_late ARM: imx legacy: pcm037: move peripheral initialization to .init_late ARM: imx legacy: mx31lilly: move peripheral initialization to .init_late ARM: imx legacy: mx31ads: move peripheral initialization to .init_late ARM: imx legacy: mx31lite: move peripheral initialization to .init_late ARM: imx legacy: kzm: move peripheral initialization to .init_late MAINTAINERS: update list of Oxnas maintainers ARM: orion5x: remove extraneous NO_IRQ ARM: orion: simplify orion_ge00_switch_init ...
Diffstat (limited to 'arch/arm/mach-uniphier/headsmp.S')
-rw-r--r--arch/arm/mach-uniphier/headsmp.S43
1 files changed, 0 insertions, 43 deletions
diff --git a/arch/arm/mach-uniphier/headsmp.S b/arch/arm/mach-uniphier/headsmp.S
deleted file mode 100644
index c819dff..0000000
--- a/arch/arm/mach-uniphier/headsmp.S
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-#include <asm/cp15.h>
-
-ENTRY(uniphier_smp_trampoline)
-ARM_BE8(setend be) @ ensure we are in BE8 mode
- mrc p15, 0, r0, c0, c0, 5 @ MPIDR (Multiprocessor Affinity Reg)
- and r2, r0, #0x3 @ CPU ID
- ldr r1, uniphier_smp_trampoline_jump
- ldr r3, uniphier_smp_trampoline_poll_addr
- mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register)
- orr r0, r0, #CR_I @ Enable ICache
- bic r0, r0, #(CR_C | CR_M) @ Disable MMU and Dcache
- mcr p15, 0, r0, c1, c0, 0
- b 1f @ cache the following 5 instructions
-0: wfe
-1: ldr r0, [r3]
- cmp r0, r2
- bxeq r1 @ branch to secondary_startup
- b 0b
- .globl uniphier_smp_trampoline_jump
-uniphier_smp_trampoline_jump:
- .word 0 @ set virt_to_phys(secondary_startup)
- .globl uniphier_smp_trampoline_poll_addr
-uniphier_smp_trampoline_poll_addr:
- .word 0 @ set CPU ID to be kicked to this reg
- .globl uniphier_smp_trampoline_end
-uniphier_smp_trampoline_end:
-ENDPROC(uniphier_smp_trampoline)