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| author | Kirill A. Shutemov <kirill@shutemov.name> | 2009-09-25 12:39:47 (GMT) |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-10-02 21:34:32 (GMT) |
| commit | 4fb2847437d871fe579f820ceb18031db3359901 (patch) | |
| tree | e2015dbc54178dd114eb0c41fa5a29d89dd15b41 /arch/arm/mm/proc-arm1020.S | |
| parent | 6806bfe18fca92e2001538b84cab5f63c5ea4bed (diff) | |
| download | linux-4fb2847437d871fe579f820ceb18031db3359901.tar.xz | |
ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()
Instruction fault status register, IFSR, was introduced on ARMv6 to
provide status information about the last insturction fault. It
needed for proper prefetch abort handling.
Now we have three prefetch abort model:
* legacy - for CPUs before ARMv6. They doesn't provide neither
IFSR nor IFAR. We simulate IFSR with section translation fault
status for them to generalize code;
* ARMv6 - provides IFSR, but not IFAR;
* ARMv7 - provides both IFSR and IFAR.
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-arm1020.S')
| -rw-r--r-- | arch/arm/mm/proc-arm1020.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index b5551bf..d9fb4b9 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -449,7 +449,7 @@ arm1020_crval: .type arm1020_processor_functions, #object arm1020_processor_functions: .word v4t_early_abort - .word pabort_noifar + .word legacy_pabort .word cpu_arm1020_proc_init .word cpu_arm1020_proc_fin .word cpu_arm1020_reset |