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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-30 17:04:01 (GMT)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-30 17:04:01 (GMT)
commitf54496f55a729078e9eef90bf9e0783857a27db1 (patch)
tree104cf71ea8349a35990a9d3b58679229a604df31 /arch/arm/mm/tlb-v7.S
parentaa2d3322989d8fd40fb2e417142c9a029d7831a4 (diff)
parentcdea460643072e1ee3647434aa254b5b81364f68 (diff)
downloadlinux-f54496f55a729078e9eef90bf9e0783857a27db1.tar.xz
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] Fix some section mismatch warnings [ARM] 4417/1: Serial: Fix AMBA drivers locking [ARM] 4394/1: ARMv7: Add the TLB range operations [ARM] 4410/1: Remove extern declarations in coyote/ixdpg425-pci.c [ARM] 4416/1: NWFPE: fix undeclared symbols [ARM] 4415/1: AML5900: fix sparse warnings from map_io [ARM] 4414/1: S3C2443: sparse fix for clock.c [ARM] 4412/1: S3C2412: reset errata fix [ARM] 4411/1: KS8695: Another serial driver fix [ARM] oprofile: avoid lockdep warnings on mpcore oprofile init [ARM] Fix stacktrace FP range checking [ARM] use __used attribute [ARM] enable arbitary speed tty ioctls and split input/output speed [ARM] remove unused header file: arch/arm/mach-s3c2410/bast.h [ARM] 4406/1: Trivial NSLU2 / NAS-100D header & setup code cleanup [ARM] 4405/1: NSLU2, DSM-G600 frequency fixup code [ARM] 4404/1: Trivial IXP42x Kconfig cleanup [ARM] 4403/1: Make the PXA-I2C driver work with lockdep validator [ARM] 4402/1: S3C2443: Add physical address of HSMMC controller [ARM] 4401/1: S3C2443: Add definitions for port GPIOJ
Diffstat (limited to 'arch/arm/mm/tlb-v7.S')
-rw-r--r--arch/arm/mm/tlb-v7.S88
1 files changed, 88 insertions, 0 deletions
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
new file mode 100644
index 0000000..b56dda8
--- /dev/null
+++ b/arch/arm/mm/tlb-v7.S
@@ -0,0 +1,88 @@
+/*
+ * linux/arch/arm/mm/tlb-v7.S
+ *
+ * Copyright (C) 1997-2002 Russell King
+ * Modified for ARMv7 by Catalin Marinas
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * ARM architecture version 6 TLB handling functions.
+ * These assume a split I/D TLB.
+ */
+#include <linux/linkage.h>
+#include <asm/asm-offsets.h>
+#include <asm/page.h>
+#include <asm/tlbflush.h>
+#include "proc-macros.S"
+
+/*
+ * v7wbi_flush_user_tlb_range(start, end, vma)
+ *
+ * Invalidate a range of TLB entries in the specified address space.
+ *
+ * - start - start address (may not be aligned)
+ * - end - end address (exclusive, may not be aligned)
+ * - vma - vma_struct describing address range
+ *
+ * It is assumed that:
+ * - the "Invalidate single entry" instruction will invalidate
+ * both the I and the D TLBs on Harvard-style TLBs
+ */
+ENTRY(v7wbi_flush_user_tlb_range)
+ vma_vm_mm r3, r2 @ get vma->vm_mm
+ mmid r3, r3 @ get vm_mm->context.id
+ dsb
+ mov r0, r0, lsr #PAGE_SHIFT @ align address
+ mov r1, r1, lsr #PAGE_SHIFT
+ asid r3, r3 @ mask ASID
+ orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA
+ mov r1, r1, lsl #PAGE_SHIFT
+ vma_vm_flags r2, r2 @ get vma->vm_flags
+1:
+ mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA (was 1)
+ tst r2, #VM_EXEC @ Executable area ?
+ mcrne p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA (was 1)
+ add r0, r0, #PAGE_SZ
+ cmp r0, r1
+ blo 1b
+ mov ip, #0
+ mcr p15, 0, ip, c7, c5, 6 @ flush BTAC/BTB
+ dsb
+ mov pc, lr
+
+/*
+ * v7wbi_flush_kern_tlb_range(start,end)
+ *
+ * Invalidate a range of kernel TLB entries
+ *
+ * - start - start address (may not be aligned)
+ * - end - end address (exclusive, may not be aligned)
+ */
+ENTRY(v7wbi_flush_kern_tlb_range)
+ dsb
+ mov r0, r0, lsr #PAGE_SHIFT @ align address
+ mov r1, r1, lsr #PAGE_SHIFT
+ mov r0, r0, lsl #PAGE_SHIFT
+ mov r1, r1, lsl #PAGE_SHIFT
+1:
+ mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA
+ mcr p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA
+ add r0, r0, #PAGE_SZ
+ cmp r0, r1
+ blo 1b
+ mov r2, #0
+ mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
+ dsb
+ isb
+ mov pc, lr
+
+ .section ".text.init", #alloc, #execinstr
+
+ .type v7wbi_tlb_fns, #object
+ENTRY(v7wbi_tlb_fns)
+ .long v7wbi_flush_user_tlb_range
+ .long v7wbi_flush_kern_tlb_range
+ .long v6wbi_tlb_flags
+ .size v7wbi_tlb_fns, . - v7wbi_tlb_fns