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authorDavid Woodhouse <David.Woodhouse@intel.com>2009-09-20 12:55:36 (GMT)
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-09-20 12:55:36 (GMT)
commit6469f540ea37d53db089c8fea9c0c77a3d9353d4 (patch)
tree1dc9dc077150d57f4424cae49e711b5dd6e903a1 /arch/arm/plat-mxc/system.c
parent304e6d5fe294b80e6d3107f99ec241816390ebcc (diff)
parent78f28b7c555359c67c2a0d23f7436e915329421e (diff)
downloadlinux-6469f540ea37d53db089c8fea9c0c77a3d9353d4.tar.xz
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: drivers/mtd/mtdcore.c Merged in order that I can apply the Nomadik nand/onenand support patches.
Diffstat (limited to 'arch/arm/plat-mxc/system.c')
-rw-r--r--arch/arm/plat-mxc/system.c29
1 files changed, 20 insertions, 9 deletions
diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c
index 79c3757..97f4279 100644
--- a/arch/arm/plat-mxc/system.c
+++ b/arch/arm/plat-mxc/system.c
@@ -27,32 +27,38 @@
#include <linux/delay.h>
#include <mach/hardware.h>
+#include <mach/common.h>
#include <asm/proc-fns.h>
#include <asm/system.h>
-#ifdef CONFIG_ARCH_MX1
-#define WDOG_WCR_REG IO_ADDRESS(WDT_BASE_ADDR)
-#define WDOG_WCR_ENABLE (1 << 0)
-#else
-#define WDOG_WCR_REG IO_ADDRESS(WDOG_BASE_ADDR)
-#define WDOG_WCR_ENABLE (1 << 2)
-#endif
+static void __iomem *wdog_base;
/*
* Reset the system. It is called by machine_restart().
*/
void arch_reset(char mode, const char *cmd)
{
- if (!cpu_is_mx1()) {
+ unsigned int wcr_enable;
+
+#ifdef CONFIG_ARCH_MXC91231
+ if (cpu_is_mxc91231()) {
+ mxc91231_arch_reset(mode, cmd);
+ return;
+ }
+#endif
+ if (cpu_is_mx1()) {
+ wcr_enable = (1 << 0);
+ } else {
struct clk *clk;
clk = clk_get_sys("imx-wdt.0", NULL);
if (!IS_ERR(clk))
clk_enable(clk);
+ wcr_enable = (1 << 2);
}
/* Assert SRS signal */
- __raw_writew(WDOG_WCR_ENABLE, WDOG_WCR_REG);
+ __raw_writew(wcr_enable, wdog_base);
/* wait for reset to assert... */
mdelay(500);
@@ -65,3 +71,8 @@ void arch_reset(char mode, const char *cmd)
/* we'll take a jump through zero as a poor second */
cpu_reset(0);
}
+
+void mxc_arch_reset_init(void __iomem *base)
+{
+ wdog_base = base;
+}