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| author | H. Peter Anvin <hpa@linux.intel.com> | 2011-08-04 23:13:20 (GMT) |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2011-08-04 23:13:20 (GMT) |
| commit | 17b0436077d99211d8b26886235a36c5ec54ac57 (patch) | |
| tree | 8bcd9b4a0f8285f749814e95ae0365c611ba2392 /arch/arm/plat-orion/gpio.c | |
| parent | aafade242ff24fac3aabf61c7861dfa44a3c2445 (diff) | |
| parent | 02f8c6aee8df3cdc935e9bdd4f2d020306035dbe (diff) | |
| download | linux-17b0436077d99211d8b26886235a36c5ec54ac57.tar.xz | |
Merge commit 'v3.0' into x86/vdso
Diffstat (limited to 'arch/arm/plat-orion/gpio.c')
| -rw-r--r-- | arch/arm/plat-orion/gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index 5b4fffa..41ab97e 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c @@ -432,7 +432,7 @@ void __init orion_gpio_init(int gpio_base, int ngpio, ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; ct->regs.ack = GPIO_EDGE_CAUSE_OFF; ct->type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; - ct->chip.irq_ack = irq_gc_ack; + ct->chip.irq_ack = irq_gc_ack_clr_bit; ct->chip.irq_mask = irq_gc_mask_clr_bit; ct->chip.irq_unmask = irq_gc_mask_set_bit; ct->chip.irq_set_type = gpio_irq_set_type; |