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author | Olof Johansson <olof@lixom.net> | 2012-09-22 21:09:21 (GMT) |
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committer | Olof Johansson <olof@lixom.net> | 2012-09-22 21:22:47 (GMT) |
commit | 0d601f613b8557cf6489f06251ae5dc383b811d0 (patch) | |
tree | 05f3a4d054e0bddc308af479918ce67cd02e8eba /arch/arm/plat-orion | |
parent | d7ffa2234c186ce040e79b43639628c1c482b115 (diff) | |
parent | 5b40baee4a39d96d4d6a48a2b2383982912c429b (diff) | |
download | linux-0d601f613b8557cf6489f06251ae5dc383b811d0.tar.xz |
Merge branch 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux into late/kirkwood
* 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: add address decoding controller to the DT
arm: mvebu: add basic address decoding support to Armada 370/XP
arm: plat-orion: make bridge_virt_base non-const to support DT use case
arm: plat-orion: introduce PLAT_ORION_LEGACY hidden config option
arm: plat-orion: use void __iomem pointers for addr-map functions
arm: plat-orion: use void __iomem pointers for time functions
arm: plat-orion: use void __iomem pointers for MPP functions
arm: plat-orion: use void __iomem pointers for UART registration functions
arm: mach-mvebu: use IOMEM() for base address definitions
arm: mach-orion5x: use IOMEM() for base address definitions
arm: mach-mv78xx0: use IOMEM() for base address definitions
arm: mach-kirkwood: use IOMEM() for base address definitions
arm: mach-dove: use IOMEM() for base address definitions
arm: mach-orion5x: use plus instead of or for address definitions
arm: mach-mv78xx0: use plus instead of or for address definitions
arm: mach-kirkwood: use plus instead of or for address definitions
arm: mach-dove: use plus instead of or for address definitions
This branch had quite a few conflicts, in particular with the PCI static
map rework from Rob Herring, and a few other context conflicts due to
changes in Kconfig, etc.
I fixed up conflicts in:
arch/arm/Kconfig
arch/arm/mach-dove/common.c
arch/arm/mach-dove/include/mach/dove.h
arch/arm/mach-kirkwood/common.c
arch/arm/mach-kirkwood/include/mach/kirkwood.h
arch/arm/mach-mv78xx0/common.c
arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
arch/arm/mach-orion5x/common.c
arch/arm/mach-orion5x/include/mach/orion5x.h
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r-- | arch/arm/plat-orion/Makefile | 9 | ||||
-rw-r--r-- | arch/arm/plat-orion/addr-map.c | 11 | ||||
-rw-r--r-- | arch/arm/plat-orion/common.c | 12 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/addr-map.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/common.h | 8 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/mpp.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/time.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-orion/mpp.c | 6 | ||||
-rw-r--r-- | arch/arm/plat-orion/time.c | 8 |
9 files changed, 30 insertions, 34 deletions
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile index c20ce0f..1251e5b 100644 --- a/arch/arm/plat-orion/Makefile +++ b/arch/arm/plat-orion/Makefile @@ -2,9 +2,8 @@ # Makefile for the linux kernel. # -obj-y := irq.o pcie.o time.o common.o mpp.o addr-map.o -obj-m := -obj-n := -obj- := +obj-y += addr-map.o -obj-$(CONFIG_GENERIC_GPIO) += gpio.o +orion-gpio-$(CONFIG_GENERIC_GPIO) += gpio.o +obj-$(CONFIG_PLAT_ORION_LEGACY) += irq.o pcie.o time.o common.o mpp.o +obj-$(CONFIG_PLAT_ORION_LEGACY) += $(orion-gpio-y) diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c index 367ca89..a7b8060 100644 --- a/arch/arm/plat-orion/addr-map.c +++ b/arch/arm/plat-orion/addr-map.c @@ -48,7 +48,7 @@ EXPORT_SYMBOL_GPL(mv_mbus_dram_info); static void __init __iomem * orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win) { - return (void __iomem *)(cfg->bridge_virt_base + (win << 4)); + return cfg->bridge_virt_base + (win << 4); } /* @@ -143,19 +143,16 @@ void __init orion_config_wins(struct orion_addr_map_cfg * cfg, * Setup MBUS dram target info. */ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, - const u32 ddr_window_cpu_base) + const void __iomem *ddr_window_cpu_base) { - void __iomem *addr; int i; int cs; orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; - addr = (void __iomem *)ddr_window_cpu_base; - for (i = 0, cs = 0; i < 4; i++) { - u32 base = readl(addr + DDR_BASE_CS_OFF(i)); - u32 size = readl(addr + DDR_SIZE_CS_OFF(i)); + u32 base = readl(ddr_window_cpu_base + DDR_BASE_CS_OFF(i)); + u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i)); /* * Chip select enabled? diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c index 87f53ca..b8a688c 100644 --- a/arch/arm/plat-orion/common.c +++ b/arch/arm/plat-orion/common.c @@ -86,13 +86,13 @@ static void __init uart_complete( struct platform_device *orion_uart, struct plat_serial8250_port *data, struct resource *resources, - unsigned int membase, + void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) { data->mapbase = mapbase; - data->membase = (void __iomem *)membase; + data->membase = membase; data->irq = irq; data->uartclk = uart_get_clk_rate(clk); orion_uart->dev.platform_data = data; @@ -120,7 +120,7 @@ static struct platform_device orion_uart0 = { .id = PLAT8250_DEV_PLATFORM, }; -void __init orion_uart0_init(unsigned int membase, +void __init orion_uart0_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) @@ -148,7 +148,7 @@ static struct platform_device orion_uart1 = { .id = PLAT8250_DEV_PLATFORM1, }; -void __init orion_uart1_init(unsigned int membase, +void __init orion_uart1_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) @@ -176,7 +176,7 @@ static struct platform_device orion_uart2 = { .id = PLAT8250_DEV_PLATFORM2, }; -void __init orion_uart2_init(unsigned int membase, +void __init orion_uart2_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) @@ -204,7 +204,7 @@ static struct platform_device orion_uart3 = { .id = 3, }; -void __init orion_uart3_init(unsigned int membase, +void __init orion_uart3_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h index fd556f7..ec63e4a 100644 --- a/arch/arm/plat-orion/include/plat/addr-map.h +++ b/arch/arm/plat-orion/include/plat/addr-map.h @@ -16,7 +16,7 @@ extern struct mbus_dram_target_info orion_mbus_dram_info; struct orion_addr_map_cfg { const int num_wins; /* Total number of windows */ const int remappable_wins; - const u32 bridge_virt_base; + void __iomem *bridge_virt_base; /* If NULL, the default cpu_win_can_remap will be used, using the value in remappable_wins */ @@ -49,5 +49,5 @@ void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg, const u8 attr, const int remap); void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, - const u32 ddr_window_cpu_base); + const void __iomem *ddr_window_cpu_base); #endif diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h index ae2377e..6bbc3fe 100644 --- a/arch/arm/plat-orion/include/plat/common.h +++ b/arch/arm/plat-orion/include/plat/common.h @@ -13,22 +13,22 @@ struct dsa_platform_data; -void __init orion_uart0_init(unsigned int membase, +void __init orion_uart0_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk); -void __init orion_uart1_init(unsigned int membase, +void __init orion_uart1_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk); -void __init orion_uart2_init(unsigned int membase, +void __init orion_uart2_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk); -void __init orion_uart3_init(unsigned int membase, +void __init orion_uart3_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk); diff --git a/arch/arm/plat-orion/include/plat/mpp.h b/arch/arm/plat-orion/include/plat/mpp.h index 723adce..254552f 100644 --- a/arch/arm/plat-orion/include/plat/mpp.h +++ b/arch/arm/plat-orion/include/plat/mpp.h @@ -29,6 +29,6 @@ #define MPP_OUTPUT_MASK GENERIC_MPP(0, 0x0, 0, 1) void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask, - unsigned int mpp_max, unsigned int dev_bus); + unsigned int mpp_max, void __iomem *dev_bus); #endif diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h index 4d5f1f6..07527e4 100644 --- a/arch/arm/plat-orion/include/plat/time.h +++ b/arch/arm/plat-orion/include/plat/time.h @@ -11,9 +11,9 @@ #ifndef __PLAT_TIME_H #define __PLAT_TIME_H -void orion_time_set_base(u32 timer_base); +void orion_time_set_base(void __iomem *timer_base); -void orion_time_init(u32 bridge_base, u32 bridge_timer1_clr_mask, +void orion_time_init(void __iomem *bridge_base, u32 bridge_timer1_clr_mask, unsigned int irq, unsigned int tclk); diff --git a/arch/arm/plat-orion/mpp.c b/arch/arm/plat-orion/mpp.c index 7740bb3..e686fe7 100644 --- a/arch/arm/plat-orion/mpp.c +++ b/arch/arm/plat-orion/mpp.c @@ -18,15 +18,15 @@ #include <plat/mpp.h> /* Address of the ith MPP control register */ -static __init unsigned long mpp_ctrl_addr(unsigned int i, - unsigned long dev_bus) +static __init void __iomem *mpp_ctrl_addr(unsigned int i, + void __iomem *dev_bus) { return dev_bus + (i) * 4; } void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask, - unsigned int mpp_max, unsigned int dev_bus) + unsigned int mpp_max, void __iomem *dev_bus) { unsigned int mpp_nr_regs = (1 + mpp_max/8); u32 mpp_ctrl[mpp_nr_regs]; diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c index 1ed8d13..0f4fa86 100644 --- a/arch/arm/plat-orion/time.c +++ b/arch/arm/plat-orion/time.c @@ -180,13 +180,13 @@ static struct irqaction orion_timer_irq = { }; void __init -orion_time_set_base(u32 _timer_base) +orion_time_set_base(void __iomem *_timer_base) { - timer_base = (void __iomem *)_timer_base; + timer_base = _timer_base; } void __init -orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask, +orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask, unsigned int irq, unsigned int tclk) { u32 u; @@ -194,7 +194,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask, /* * Set SoC-specific data. */ - bridge_base = (void __iomem *)_bridge_base; + bridge_base = _bridge_base; bridge_timer1_clr_mask = _bridge_timer1_clr_mask; ticks_per_jiffy = (tclk + HZ/2) / HZ; |