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authorBen Dooks <ben-linux@fluff.org>2010-05-04 06:01:44 (GMT)
committerBen Dooks <ben-linux@fluff.org>2010-05-06 00:32:30 (GMT)
commiteee2b94f01f7379940a656af8ef097749ce025b5 (patch)
tree710ff6594a5619df3ffc48b1a661ce68de5cc1a8 /arch/arm/plat-s3c24xx/gpio.c
parent40b956f026a3303a67d2ab7fffa2331f72e1e019 (diff)
downloadlinux-eee2b94f01f7379940a656af8ef097749ce025b5.tar.xz
ARM: S3C24XX: Remove s3c2410_gpio_setcfg()
Remove the implementation of s3c2410_gpio_setcfg() as it should now be functionally equivalent to s3c_gpio_cfgpin(), and add a wrapper for those drivers that are still using this call. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/gpio.c')
-rw-r--r--arch/arm/plat-s3c24xx/gpio.c48
1 files changed, 0 insertions, 48 deletions
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c
index 5467470..0b3b2cb 100644
--- a/arch/arm/plat-s3c24xx/gpio.c
+++ b/arch/arm/plat-s3c24xx/gpio.c
@@ -34,54 +34,6 @@
#include <mach/regs-gpio.h>
-void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
-{
- void __iomem *base = S3C24XX_GPIO_BASE(pin);
- unsigned long mask;
- unsigned long con;
- unsigned long flags;
-
- if (pin < S3C2410_GPIO_BANKB) {
- mask = 1 << S3C2410_GPIO_OFFSET(pin);
- } else {
- mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
- }
-
- switch (function) {
- case S3C2410_GPIO_LEAVE:
- mask = 0;
- function = 0;
- break;
-
- case S3C2410_GPIO_INPUT:
- case S3C2410_GPIO_OUTPUT:
- case S3C2410_GPIO_SFN2:
- case S3C2410_GPIO_SFN3:
- if (pin < S3C2410_GPIO_BANKB) {
- function -= 1;
- function &= 1;
- function <<= S3C2410_GPIO_OFFSET(pin);
- } else {
- function &= 3;
- function <<= S3C2410_GPIO_OFFSET(pin)*2;
- }
- }
-
- /* modify the specified register wwith IRQs off */
-
- local_irq_save(flags);
-
- con = __raw_readl(base + 0x00);
- con &= ~mask;
- con |= function;
-
- __raw_writel(con, base + 0x00);
-
- local_irq_restore(flags);
-}
-
-EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
-
unsigned int s3c2410_gpio_getcfg(unsigned int pin)
{
void __iomem *base = S3C24XX_GPIO_BASE(pin);