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author | Kefeng Wang <wangkefeng.wang@huawei.com> | 2016-01-29 08:39:02 (GMT) |
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committer | Wei Xu <xuwei5@hisilicon.com> | 2016-02-25 13:15:58 (GMT) |
commit | 6897db62bbb322124ee7a5ee527134cde76d4aa1 (patch) | |
tree | 2eab9f0af5736ddea43e17a70d5160c937fbcd0c /arch/arm64/boot/dts/hisilicon/hip05.dtsi | |
parent | dbb58d0f79207d35f298b619a87fb81dbcae788d (diff) | |
download | linux-6897db62bbb322124ee7a5ee527134cde76d4aa1.tar.xz |
arm64: dts: hip05: Use Cortex specific device node for pmu
Instead of using the generic armv8-pmuv3 compatibility, use
the more specific Cortex A57 compatibility.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm64/boot/dts/hisilicon/hip05.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/hisilicon/hip05.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi index db2039d..ed31f19 100644 --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi @@ -262,7 +262,7 @@ }; pmu { - compatible = "arm,armv8-pmuv3"; + compatible = "arm,cortex-a57-pmu"; interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; }; |