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| author | Ivan T. Ivanov <ivan.ivanov@linaro.org> | 2015-09-18 13:18:54 (GMT) |
|---|---|---|
| committer | Andy Gross <agross@codeaurora.org> | 2015-12-08 20:34:22 (GMT) |
| commit | d66dd9e08fc7f3220d61ce4992f2db00b2f701af (patch) | |
| tree | 264aa532c61b62ad20230f7f38401ee26ff36ade /arch/arm64/boot/dts | |
| parent | 806c765ee9da58ca0ade34345f1b114dc0be97fd (diff) | |
| download | linux-d66dd9e08fc7f3220d61ce4992f2db00b2f701af.tar.xz | |
arm64: dts: qcom: 8x16: UART1 and UART2 use DMA for RX and TX
Add DMA channels definitions for UART1 and UART2 controllers.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Diffstat (limited to 'arch/arm64/boot/dts')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 8d184ff1..8288194 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -109,6 +109,8 @@ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; + dmas = <&blsp_dma 1>, <&blsp_dma 0>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -118,6 +120,8 @@ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; + dmas = <&blsp_dma 3>, <&blsp_dma 2>; + dma-names = "rx", "tx"; status = "disabled"; }; |