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| author | yangbo lu <yangbo.lu@nxp.com> | 2017-04-21 03:52:35 (GMT) |
|---|---|---|
| committer | Xie Xiaobo <xiaobo.xie@nxp.com> | 2017-07-14 09:57:23 (GMT) |
| commit | 639a4da1672bfa4a611da89eefe4c71a62b98cef (patch) | |
| tree | 4025786991e78cbec008178c2e8598a86c4ce4d8 /arch/arm64/boot/dts | |
| parent | 24aabdd3f4305ab0d9c49f42cadf6b33dc2be9ef (diff) | |
| download | linux-639a4da1672bfa4a611da89eefe4c71a62b98cef.tar.xz | |
arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDS
This patch is to enable SD UHS-I mode on LS208xRDB and eMMC HS200
mode on LS208xQDS in dts. Also, the eSDHC peripheral clock must be
used instead of platform clock to support these modes.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 2 |
3 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi index c4282d9..b237446 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi @@ -46,6 +46,7 @@ */ &esdhc { + mmc-hs200-1_8v; status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi index 9a1d0d2..29af54b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi @@ -46,6 +46,10 @@ */ &esdhc { + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-sdr25; + sd-uhs-sdr12; status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 6e531b9..94cdd30 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -472,7 +472,7 @@ compatible = "fsl,ls2080a-esdhc", "fsl,esdhc"; reg = <0x0 0x2140000 0x0 0x10000>; interrupts = <0 28 0x4>; /* Level high type */ - clock-frequency = <0>; /* Updated by bootloader */ + clocks = <&clockgen 4 1>; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; little-endian; |